Senior AMS DV Engineer

Analog Devices

. Act as a mixed-signal verification team member in a multi-disciplinary, multi-site development team spanning Digital, Analog, DV, Implementation, and Layout .

Posted 10/4/2026full-timeValencia • SpainSenior💰 €43,120 - €62,440 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in chip-level AMS verification for SoCs, with a strong focus on developing verification strategies and methodologies. Proficient in coding SVRNM models and utilizing mixed signal simulators, while effectively collaborating with cross-functional teams and mentoring peers.

Highest-signal resume keywords

AMS VerificationUVM MethodologiesCadence FlowSVRNM CodingPython Scripting

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

AMS VerificationUVM MethodologiesSVRNM CodingVerilog-AMSObject-Oriented ProgrammingDocumentation SkillsMixed Signal SimulationDigital Mixed Signal VerificationDebugging SkillsAnalysing Skills

Soft Skills

Team PlayerLeadershipMentoring

Tools & Technologies

Cadence AMSJira

Certifications & Qualifications

Electronic Engineering Degree

Industry Keywords

SoCPortable Consumer ApplicationsTier 1 OEMsExport Licensing

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Act as a mixed-signal verification team member in a multi-disciplinary, multi-site development team spanning Digital, Analog, DV, Implementation, and Layout
Contribute to verification strategy and methodology improvement
Understand device requirements and create a traceable AMS verification plan
Code or generate SVRNM models of required analog blocks and validate them against schematics
Develop directed tests in an AMS environment or reuse constrained-random UVM test cases
File and track bugs to closure in Jira
Document assigned-task results and review them with the team
Work on new product solutions for portable consumer applications and engage directly with Tier 1 OEMs
Provide supervisor/mentor leadership opportunities

Requirements

What you’ll need

Electronic Engineering degree with 5+ years’ experience in chip-level AMS (analog mixed signal) verification of SoC
Familiarity with digital verification methodologies such as digital mixed signal verification (DMS) using UVM
Fluent with Cadence-based flow, including creating schematics and simulator/netlist options
Experience with mixed signal simulators such as Cadence AMS or equivalent
Experience with SVRNM or Verilog-AMS behavioral model coding for analog blocks
Strong coding, object-oriented programming, and documentation skills
Experience with a scripting language such as Python, C, or Perl would be an advantage
Team player with good analysing and debugging skills
Some limited travel should be expected
Required travel: 10% of the time
Applicants may be subject to export licensing review unless they are US Citizens, US Permanent Residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3)

Benefits

Comp & perks

Discretionary performance-based bonus
Variable compensation may be available
Paid annual leave
Supplemental benefits as applicable under local policy and the terms and conditions of employment