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Senior Engineer, Digital Verification
Analog Devices. Lead verification planning and execution for complex digital and mixed-signal designs .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expert-level knowledge in SystemVerilog and Universal Verification Methodology (UVM) while leading verification planning and execution for complex digital and mixed-signal designs. Proficient in developing advanced test strategies and providing technical guidance to junior engineers.
Highest-signal resume keywords
Expert-Level Knowledge Of SystemVerilogUniversal Verification Methodology (UVM)Advanced Proficiency In PythonMixed-Signal Design PrinciplesDebugging Skills Across Digital And Mixed-Signal Domains
ATS Keywords
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Hard Skills
Digital IC VerificationMixed-Signal IC VerificationTest Bench DevelopmentCoverage Analysis MethodologiesConstrained-Random Verification TechniquesAssertion-Based Verification TechniquesVerification Methodology ImprovementsSilicon Bring-UpPost-Silicon ValidationTechnical Guidance
Soft Skills
Analytical SkillsMentoringCollaborationInfluencing Technical Direction
Tools & Technologies
UVM-Based Verification EnvironmentsPythonPerlTCL
Industry Keywords
Electrical EngineeringComputer EngineeringMixed-Signal ProductsVerification PlanningTechnical Forums
Tech Stack
Tools & technologiesPerlPython
About the role
Key responsibilities & impact- Lead verification planning and execution for complex digital and mixed-signal designs
- Architect and implement comprehensive verification strategies
- Drive development of UVM-based verification environments for sophisticated mixed-signal products
- Establish and oversee code and functional coverage metrics across multiple projects
- Lead debugging of complex design issues spanning digital and mixed-signal domains
- Provide technical guidance and mentoring to junior verification engineers
- Collaborate with design teams on verification planning and issue resolution
- Lead silicon bring-up and post-silicon validation activities
- Contribute to verification methodology improvements and best-practice development
- Represent Analog Devices in technical forums and customer interactions
Requirements
What you’ll need- Bachelor's degree required in Electrical Engineering, Computer Engineering, or related field
- Master's degree preferred
- 4–8 years of relevant digital/mixed-signal IC verification experience
- Expert-level knowledge of SystemVerilog and Universal Verification Methodology (UVM)
- Demonstrated mastery in developing advanced test benches for complex mixed-signal product verification
- Ability to develop and implement sophisticated test strategies and detailed coverage analysis methodologies
- Advanced proficiency in Python, Perl, and TCL
- Exceptional analytical and debugging skills across digital and mixed-signal domains
- Expert-level experience with constrained-random and assertion-based verification techniques
- Comprehensive understanding of mixed-signal design principles and advanced verification methodologies
- Ability to influence technical direction and methodology adoption across verification teams
- Required travel of 10% of the time
- Applicants may be subject to export licensing review; exceptions include US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3)
Benefits
Comp & perks- Competitive compensation and benefits
- Work-life balance
- Continuous learning opportunities
- Mentorship from industry experts
- Collaborative and innovative work environment
- Opportunity to work on cutting-edge projects