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Analog Devices

Staff Digital Design Engineer

Analog Devices

. Define and develop system-level architectures and microarchitectures for complex digital ASIC designs .

Posted 10/7/2026full-timeUnited StatesLeadWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Expertise in designing complex digital ASIC architectures and synthesizable SystemVerilog RTL, with a strong focus on simulation, synthesis, and timing closure. Proven ability to lead technical teams, mentor engineers, and drive methodology improvements across digital design projects.

Highest-signal resume keywords
Digital ASIC DesignSystemVerilog RTLSimulation And DebugSynthesis And Timing ClosureTechnical Leadership

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Digital Logic DesignMicroarchitecture DevelopmentStatic Timing AnalysisConstraints DefinitionDesign VerificationAlgorithm AccelerationDSP DesignAPI Logic ConfigurationHardware-Software InteractionDigital Design Methodologies
Soft Skills
Verbal CommunicationWritten CommunicationCollaborationMentoring
Tools & Technologies
CAD ToolsSimulation ToolsDebugging ToolsSynthesis Tools
Industry Keywords
ASIC DevelopmentDigital DesignFront-End Quality ChecksTechnical DirectionEngineering Judgment

About the role

Key responsibilities & impact
  • Define and develop system-level architectures and microarchitectures for complex digital ASIC designs
  • Design synthesizable SystemVerilog RTL for arithmetic DSP, algorithm accelerators, serial interfaces, and processor-subsystem memory and bus controllers
  • Lead design simulation, debugging, integration, and technical reviews for complex digital design projects
  • Define constraints and drive synthesis, static timing analysis, lint, CDC, and related implementation and signoff flows using industry-leading CAD tools
  • Partner with physical design engineers, provide implementation guidance, and monitor IC layout progress through closure
  • Collaborate with system engineers to interpret customer specifications and translate them into clear, verifiable design requirements
  • Work with firmware and API engineers to define logic configurations, use cases, and hardware-software debug strategies
  • Guide methodology improvements and best practices across the organization
  • Influence product direction and technical roadmaps through engineering judgment and tradeoff analysis
  • Mentor engineers, lead small technical teams, and help develop technical talent

Requirements

What you’ll need
  • Deep experience designing complex digital logic for ASICs, including synthesizable SystemVerilog RTL
  • Expert ability to define, partition, and implement complex digital system architectures and microarchitectures
  • Hands-on experience with simulation and debug, synthesis, static timing analysis, constraints, and related front-end quality checks
  • Demonstrated ability to set technical direction, lead design reviews, resolve complex issues, and guide engineering teams
  • Deep knowledge across multiple technical domains relevant to digital design, integration, and hardware-software interaction
  • Authority in digital design methodologies with the ability to improve quality, efficiency, reuse, and predictability
  • Strong verbal and written communication skills and ability to collaborate across system, verification, physical design, firmware, and product teams
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
  • Typically 8-12 years of relevant digital design experience, including substantial ASIC development experience
  • Demonstrated success delivering digital designs through architecture, RTL implementation, verification, synthesis, timing closure, and physical-design collaboration
  • Basic understanding of how to use AI for coding and scripting
  • Applicants may be subject to export licensing review unless they are US Citizens, US Permanent Residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3)

Benefits

Comp & perks
  • Competitive compensation
  • Comprehensive benefits
  • Professional growth opportunities
  • Opportunity to mentor the next generation of engineers
  • Technical thought leadership and strategic influence
  • Company-wide impact opportunities
  • 10% required travel