Apply

Ready to go for it?

AI Apply speeds things up—apply directly if you prefer.

FREE ACCESS
5,000–10,000 jobs/day
Scoutfield Logo

See all jobs on Scoutfield

Search thousands of fresh jobs every day.

Discover
  • Fresh listings
  • Fast filters
  • No subscription required
Create a free account and start exploring right away.
Analog Devices

Staff Engineer, Analog Design Engineering

Analog Devices

. Lead detailed definition and architectural development of high-performance mixed-signal ICs .

Posted 10/9/2026full-timeTaipei • TaiwanLeadWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in analog and power management IC design, including architecture definition, circuit implementation, and verification. Proficient in using AI tools for design automation and has extensive experience in mixed-signal SoC integration.

Highest-signal resume keywords
Analog Circuit DesignPower Management IC DevelopmentCadence Design EnvironmentMixed-Signal SimulationAI-Assisted Tools

ATS Keywords

Tailor your resume
Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Mixed-Signal IC DesignTransistor-Level Circuit ImplementationPower-Block Bring-UpSilicon DebugSwitching RegulatorsLDOsCharge PumpsData ConvertersAmplifiersBiasing Circuits
Soft Skills
Cross-Functional CollaborationIndependent Leadership
Tools & Technologies
CadenceSimplis
Certifications & Qualifications
M.S. in Electrical EngineeringPh.D. in Electrical Engineering
Industry Keywords
SoC IntegrationElectrical SpecificationsProduct Objective SpecificationsSilicon ValidationAnalog Building Blocks

Tech Stack

Tools & technologies
Switching

About the role

Key responsibilities & impact
  • Lead detailed definition and architectural development of high-performance mixed-signal ICs
  • Drive system-level trade-offs and transistor-level design decisions
  • Own architecture definition, block-level design, transistor-level circuit implementation, simulation, and verification
  • Develop Product Objective Specifications covering die size, package, pinout, block diagrams, and electrical specifications
  • Collaborate with system architects on end-to-end power architectures and mixed-signal SoC integration
  • Support layout, lab evaluation, testing, qualification, and product engineering to meet delivery, requirements, and quality goals
  • Lead power-block bring-up, silicon debug, and optimization across process, voltage, and temperature variations
  • Apply AI tools and techniques to design automation, optimization, and modeling workflows
  • Improve analog design and verification methodologies to reduce time and cost to market

Requirements

What you’ll need
  • M.S. in Electrical Engineering with 7+ years of relevant analog and power management IC design experience, or Ph.D. with a minimum of 5+ years of relevant experience
  • Extensive hands-on experience in power management IC development, including switching regulators (buck/boost/buck-boost), LDOs, and charge pumps
  • Solid understanding of analog circuit design fundamentals
  • Experience with amplifiers, data converters (ADCs/DACs), PLL, bandgap references, biasing circuits, and related analog building blocks
  • Proficiency in Cadence design environment and mixed-signal simulation
  • Proficiency in Simplis
  • Ability to work effectively across geographically distributed and cross-functional teams
  • Ability to independently lead circuit-block or complete-system design from architecture through silicon validation and product debug
  • Experience integrating power management and analog IP into complex SoC environments is a strong advantage
  • Experience or awareness of AI-assisted tools is a plus
  • Applicants may be subject to export licensing review; exceptions include US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3)

Benefits

Comp & perks
  • Equal opportunity employment
  • No required travel
  • 1st Shift/Days schedule