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Staff Engineer, Digital Design Engineering
Analog Devices. Define and develop system-level architectures for complex digital designs .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in RTL Digital Design, System-Level Architectures, and SoC Integration, with a strong focus on verification methodologies and AI tools to enhance design processes. Proven ability to lead complex projects from architecture through silicon validation and debug.
Highest-signal resume keywords
RTL Digital DesignSystem-Level ArchitectureSoC IntegrationVerification MethodologiesAI Tools and Techniques
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
Digital IC DesignMicro-Architecture DecisionsBlock-Level VerificationSynthesisTiming ClosurePower ClosureDigital ImplementationECOFormal VerificationDebug Activities
Soft Skills
Excellent Communication SkillsAnalytical SkillsProblem-Solving SkillsSelf-DrivenResilience
Tools & Technologies
EDA FlowsPythonTclPerlAI-Assisted Tools
Certifications & Qualifications
M.S. in Electrical EngineeringPh.D. in Electrical Engineering
Industry Keywords
Digital DesignSoCSilicon ValidationDigital Signal ProcessingCPUDSPNPUDesign AutomationOptimizationMethodology Improvements
Tech Stack
Tools & technologiesPerlPython
About the role
Key responsibilities & impact- Define and develop system-level architectures for complex digital designs
- Lead RTL digital design for complex blocks and subsystems
- Drive key micro-architecture decisions while balancing performance, power, and area
- Document detailed block- and subsystem-level design specifications and implementation results
- Work with the verification team on verification planning, waveform debug, regression, troubleshooting, and coverage sign-off
- Participate in digital implementation activities including lint, CDC, constraints, synthesis, formal verification, ECO, timing, and power closure
- Support silicon bring-up, characterization, and debug activities
- Guide methodology improvements and best practices across the organization
- Apply AI tools and techniques to enhance design automation, optimization, and modeling workflows
- Improve analog design and verification methodologies to reduce time and cost to market
Requirements
What you’ll need- M.S. in Electrical Engineering with a minimum of 7 years, or Ph.D. with a minimum of 5 years, of digital IC / SoC design experience
- Strong hands-on expertise in RTL design, digital architecture, and SoC integration
- Solid understanding of block-level and system-level verification methodologies and flows
- Familiarity with EDA flows (synthesis, STA, verification) and scripting languages such as Python, Tcl, or Perl
- Excellent communication skills, with the ability to clearly communicate with cross-functional stakeholders
- Self-driven, resilient, strong analytical and problem-solving skills
- Ability to independently lead the design and development of circuit blocks or complete systems, driving projects from architecture and design through silicon validation and product debug
- Knowledge of computer architecture, digital signal processing, CPU/DSP/NPU is a plus
- Experience or awareness of AI-assisted tools to improve design productivity is a plus
- Applicants, except US Citizens, US Permanent Residents, and protected individuals, may have to undergo export licensing review
- Required travel of 10% of the time
- 1st Shift/Days
Benefits
Comp & perks- Equal opportunity employment
- Required travel: 10% of the time