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Panel Packaging Technology Enablement Director
Applied Materials. Define and execute the panel technology enablement roadmap .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Expertise in semiconductor packaging and integration, with a strong focus on advanced packaging technologies such as 2.5D/3D packaging and fine-line RDL. Proven ability to lead multidisciplinary engineering teams, manage complex technology programs, and establish strategic partnerships within the industry.
Highest-signal resume keywords
Ph.D. In Chemistry, Materials Science, Chemical Engineering, Electrical Engineering, Or PhysicsAdvanced Packaging IntegrationPanel-Format ProcessingExperience Presenting To Senior LeadershipTrack Record Of Patents And Publications
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
Advanced Packaging Integration2.5D/3D PackagingHigh-Density SubstratesFine-Line RDLPVDPlatingEtchLithographyDielectric ProcessesStatistical Methods
Soft Skills
LeadershipNegotiationCommunicationMentoringTeam Building
Tools & Technologies
AI Accelerator ArchitecturesHPC Package ArchitecturesChiplet IntegrationHBM Co-Packaging
Industry Keywords
Semiconductor PackagingSubstrate Technology DevelopmentInterconnect Technology DevelopmentJoint Development AgreementsIndustry Consortia Participation
About the role
Key responsibilities & impact- Define and execute the panel technology enablement roadmap
- Translate AI package architecture requirements into unit process and integration targets
- Plan integrated process flows spanning core formation, through-glass via fabrication and metallization, fine-line RDL and build-up layers, and panel-scale interconnect
- Lead complex integration programs from concept through customer transfer, including customized process development
- Design and analyze engineering experiments using DOE and statistical methods
- Establish process windows and resolve root causes on multi-process integration issues
- Identify gaps in the Applied portfolio and provide feedback on process and hardware improvements
- Coordinate across product divisions to deliver integrated panel solutions
- Serve as primary technical lead to strategic customers on panel packaging
- Position new technologies, negotiate process specifications and service offerings, and deliver customer solutions
- Establish and oversee joint development programs, evaluations, and beta-site activities
- Make executive-level presentations to customer and partner leadership
- Build and manage strategic ecosystem partnerships
- Represent Applied Materials on industry consortia, standards bodies, and technical committees
- Publish and present at packaging conferences and journals
- Build, lead, and develop a multidisciplinary engineering team
- Set team priorities and own resource and budget planning
- Recruit and retain technical talent and mentor engineers
- Track program progress, communicate issues, and coordinate resources across business units
- Lead patent and publication generation in panel technology
Requirements
What you’ll need- Ph.D. in chemistry, materials science, chemical engineering, electrical engineering, physics, or a related field with 12+ years of experience in semiconductor packaging, substrate, or interconnect technology development, or M.S. with 15+ years
- Hands-on technical depth in advanced packaging integration, such as 2.5D/3D packaging, high-density substrates, fan-out, or build-up processing
- Working knowledge of PVD, plating, etch, lithography, and dielectric processes
- Demonstrated record of leading engineering teams and delivering complex technology programs to customers or into high-volume manufacturing
- Experience presenting to and negotiating with senior customer and partner leadership
- Track record of patents, publications, and conference presentations
- Direct experience with panel-format processing, glass core substrates, through-glass vias, or fine-line RDL at sub-5 µm line/space preferred
- Familiarity with AI accelerator and HPC package architectures, including chiplet integration and HBM co-packaging preferred
- Established relationships across the Asia-Pacific substrate and OSAT ecosystem and participation in industry consortia preferred
- Experience managing joint development agreements and multi-party technical programs preferred
Benefits
Comp & perks- Supportive work culture encouraging learning, development, and career growth
- Comprehensive benefits package
- Bonus program eligibility, as applicable
- Stock award program eligibility, as applicable
- Travel and relocation eligibility