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Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates extensive experience in RTL design and functional verification for digital hardware components, with a strong understanding of digital architecture and ASIC/FPGA design flows. Proficient in collaborating across teams to align performance goals and support hardware-software co-design.
Highest-signal resume keywords
RTL Design (Verilog/SystemVerilog)Functional VerificationDigital ArchitectureASIC and FPGA Design FlowsEnglish Proficiency
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
RTL DesignFunctional VerificationTestbench DevelopmentAssertionsCoverage MetricsDebuggingSynthesisTiming AnalysisMemory SubsystemsControl Logic
Tools & Technologies
UVMSimulationHardware TestbenchesPhysical DesignCAD Tools
Industry Keywords
Digital HardwareAI/ML ApplicationsPipeliningArbitrationMemory HierarchySystem-Level IntegrationMicroarchitectureDFT
About the role
Key responsibilities & impact- Design and verify custom digital hardware components and architectures for high-performance, tightly integrated computation workloads
- Interface Arago’s custom tensor unit for advanced AI/ML applications
- Design, implement, and verify RTL blocks for memory, control, and compute subsystems within Arago’s custom multiphysics computation unit
- Collaborate with system software and architecture teams to define block-level specifications and align performance and integration goals
- Develop and maintain functional verification infrastructure across simulation and hardware testbenches
- Support synthesis, timing analysis, and backend integration with physical design and CAD engineers
- Contribute to architectural exploration and hardware-software co-design for future compute-platform iterations
Requirements
What you’ll need- Extensive experience in RTL design (Verilog/SystemVerilog) for control logic, datapaths, memory subsystems, and specialized processing units
- Strong understanding of digital architecture, including pipelining, arbitration, memory hierarchy, and system-level integration
- Proficiency in functional verification, including testbench development, assertions, coverage metrics, and debugging; UVM experience is a plus
- Familiarity with ASIC and FPGA design flows, including synthesis, timing closure, and DFT
- Comfortable working across the full hardware stack, from architectural specification and microarchitecture to physical implementation support
- English at a proficient level
- French is a plus
Benefits
Comp & perks- Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions
- Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers)
- Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location
- Healthcare coverage, including family-friendly options
- Pension contributions
- Professional development support
- 25 days of PTO, in addition to public holidays
- Ownership of a key technical domain
- Significant vertical and/or horizontal growth opportunities, based on performance and individual drive
- Reimbursement of 50% of the public transport subscription fee
- A high-paced, multicultural, and engineering-led environment