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Atos

ASIC/SoC Verification Engineer, SystemVerilog, UVM

Atos

. Define and develop functional verification strategies for ASIC and SoC blocks .

Posted 10/8/2026full-timeEchirolles • FranceMid-LevelSenior💰 €40,000 - €50,000 per yearWebsite

Core Competencies

Role fit
Core Competencies

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Demonstrates expertise in ASIC and SoC verification, utilizing SystemVerilog and UVM methodologies to develop functional verification strategies and maintain verification environments. Proficient in simulation analysis, debugging, and regression management within collaborative semiconductor and embedded systems projects.

Highest-signal resume keywords
SystemVerilog ProficiencyUVM Methodologies ExpertiseASIC/SoC Verification ExperienceRegression Management and AutomationFunctional Coverage and Code Coverage

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Functional VerificationRTL VerificationSimulation Result AnalysisComplex DebuggingSVA AssertionsVIP (Verification IP)ScoreboardsPerformance AnalysisCoverage MechanismsTestbench Development
Soft Skills
Attention to DetailAnalytical SkillsTeam SpiritProblem-SolvingCollaboration
Tools & Technologies
CadenceMentor GraphicsUVMSystemVerilogSimulation Environments
Industry Keywords
ASICSoCSemiconductorEmbedded SystemsFunctional Validation

About the role

Key responsibilities & impact
  • Define and develop functional verification strategies for ASIC and SoC blocks
  • Design and maintain verification environments based on UVM methodologies
  • Develop SystemVerilog testbenches
  • Run simulation campaigns and analyze results
  • Identify, investigate, and resolve issues through advanced debugging activities
  • Set up and manage regression campaigns
  • Participate in RTL verification and functional validation of SoC architectures
  • Develop and use coverage mechanisms, assertions, VIP, and scoreboards
  • Collaborate with Design, Architecture, and Validation teams to ensure deliverable quality
  • Contribute to innovative projects in the semiconductor and embedded systems sectors

Requirements

What you’ll need
  • Master’s degree (engineering school or university) in electronics, microelectronics, embedded systems, or a related field
  • At least 3 years of experience in ASIC or SoC verification
  • Strong proficiency in SystemVerilog
  • Expertise in UVM methodologies
  • High-level functional verification
  • RTL verification
  • SoC functional verification
  • Simulation result analysis
  • Complex debugging and problem-solving
  • Regression management and automation
  • Experience with Cadence and/or Mentor Graphics environments
  • Functional coverage and code coverage
  • SVA assertions
  • VIP (Verification IP)
  • Scoreboards and performance analysis
  • A good level of technical English is expected for working in an international environment
  • Ability to work effectively in collaborative, highly technical projects
  • Attention to detail, analytical skills, and team spirit

Benefits

Comp & perks
  • Up to 3 days of remote work per week
  • Meal vouchers (€10, with 60% covered by the company)
  • Paid time off available from your first day
  • Employee referral bonus of up to €2,750
  • Access to social and cultural activities
  • Sustainable mobility assistance (bicycle, carpooling)
  • Personalized career development opportunities
  • More than 600 certified training courses
  • Dedicated support and close guidance
  • Opportunity to work on innovative projects at the heart of the semiconductor and embedded systems industries