Principal RF/mmWave IC Layout Design Engineer

BLUE ORIGIN

. Lead physical design and implementation of RF/mmWave ICs, including transmitter and receiver front-end blocks .

Posted 10/30/2026full-timeSan Diego • California • United StatesLead💰 $269,175 - $376,844 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive expertise in RF/mmWave IC layout and physical implementation, with a strong focus on transmitter and receiver front-end circuits. Proficient in managing complex layout challenges, integrating advanced semiconductor processes, and leading cross-functional teams to ensure successful tape-out and product lifecycle completion.

Highest-signal resume keywords

RF/mmWave IC LayoutPhysical Design Sign-Off FlowsCadence Virtuoso/Virtuoso XLTechnical LeadershipAnalog Building Blocks

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

RF/mmWave IC LayoutPhysical ImplementationDevice-Level Layout TechniquesParasitic Effects UnderstandingElectromigration RequirementsHigh-Frequency RF LayoutIntegration of RF CircuitsLayout Verification ChecksTape-Out PreparationSignal Integrity

Soft Skills

Strong Communication SkillsIndependent Problem SolvingMentoring

Tools & Technologies

Cadence Virtuoso/Virtuoso XLSiemens CalibreQuantusEMX

Industry Keywords

RF CMOSSOISiGeAnalog ICsMixed-Signal DesignHigh-Volume ChipsetsBeamforming ICsPhased-Array ArchitecturesIII-V TechnologiesElectromigration

Tech Stack

Tools & technologies

Assembly

About the role

Key responsibilities & impact

Lead physical design and implementation of RF/mmWave ICs, including transmitter and receiver front-end blocks
Drive block-to-top integration, including chip-level floorplanning, power and ground planning, signal routing, ESD strategy, pad assembly, density fill, and design-for-manufacturability requirements
Lead chip-level integration approaches optimizing RF performance, isolation, area, reliability, and manufacturability
Perform and debug DRC, LVS, ERC, antenna, density, and related physical verification checks
Support parasitic extraction and post-layout analysis; resolve performance, coupling, EM, IR, reliability, and extraction issues with circuit designers
Develop layout schedules, identify implementation risks and dependencies, and deliver verified layouts aligned with milestones and tape-out schedules
Prepare and release final layout databases to the foundry and support tape-out readiness reviews and mask database delivery
Lead layout reviews, define and document best practices, and mentor less-experienced layout engineers and designers
Coordinate layout execution across internal teams, third-party design partners, and cross-functional stakeholders across multiple locations
Travel up to 10% of the time

Requirements

What you’ll need

B.S. degree in Electrical Engineering, Electronic Engineering, Computer Engineering, or a related technical field
10+ years of professional experience in RF/mmWave, analog, or mixed-signal custom IC layout and physical implementation
Extensive hands-on experience with high-frequency RF/mmWave IC layout in RF CMOS, SOI, SiGe, or related advanced semiconductor processes
Successful completion of multiple IC product lifecycles or tape-outs, preferably including high-volume or mission-critical chipsets
Strong expertise in layout and integration of RF transmitter and receiver front-end circuits, including one or more full TX/RX chains
Direct experience laying out RF/mmWave blocks such as LNAs, PAs, mixers, VCOs, frequency synthesizers, phase shifters, VGAs, multipliers, and RF passives
Strong understanding of device-level layout techniques, including matching, symmetry, shielding, common-centroid layout, interdigitation, guard rings, and isolation structures
Strong understanding of parasitic effects, coupling mechanisms, grounding strategies, substrate noise isolation, differential routing, and RF signal integrity
Experience with analog building blocks such as operational amplifiers, bias generators, temperature sensors, LDOs, ADCs, DACs, and related support circuitry
Strong understanding of physical design sign-off flows, including LVS, DRC, ERC, parasitic extraction, EM/IR analysis, current density, and electromigration requirements
Proficiency with Cadence Virtuoso/Virtuoso XL, Siemens Calibre, Quantus, EMX, or equivalent tools
Experience with top-level integration, including floorplanning, hierarchical integration, ESD, pad integration, density fill, DFM, and tape-out preparation
Strong communication skills and ability to work independently on complex layout challenges while influencing technical direction across teams
Must be a U.S. citizen or national, U.S. permanent resident/current Green Card holder, or lawfully admitted into the U.S. as a refugee or granted asylum
Technical leadership or layout team management experience preferred
Experience with beamforming front-end ICs, phased-array architectures, or highly integrated RF/mmWave transceivers preferred
Experience with III-V technologies such as GaAs or GaN preferred
Experience implementing and optimizing RF passive structures preferred
Successful completion of a technical assessment
Standard background check required for all positions

Benefits

Comp & perks

Relocation provided
Medical, dental, and vision insurance
Basic and supplemental life insurance
Paid parental leave
Short- and long-term disability
401(k) with company match of up to 5%
Education Support Program
Stock options for all regular employees working at least 20 hours per week
Up to four weeks of paid time off per year based on weekly scheduled hours
Up to 14 company-paid holidays
Potential benefits and bonuses based on role type, job level, individual contributions, and company results