ASIC DFT Engineer

Broadcom

. Lead DFT programs from chip-level DFT specification through implementation and verification to product release .

Posted 9/15/2026full-timeFort Collins • California • United StatesMid-LevelSenior💰 $109,700 - $175,500 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive expertise in DFT methodologies, including Scan, BIST, and ATPG, with a strong focus on ASIC specifications and silicon validation. Proven ability to collaborate across multi-disciplinary teams to innovate and automate DFT solutions for advanced technology nodes.

Highest-signal resume keywords

DFT ImplementationATPG Vector GenerationScan Insertion and CompressionVerilog Coding and SimulationSilicon Debug and Validation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

DFT SpecificationScanMBISTTAPLBISTIO DFTSerDesBoundary ScanLogic BISTTest Vector Generation

Soft Skills

Problem SolvingDebuggingRoot Cause AnalysisCommunicationProject Management

Tools & Technologies

DFT CompilerMentor TestKompressTetraMaxFastscanTessent SSN

Industry Keywords

IEEE1149.1IEEE1149.6IEEE1687IJTAGICLPDLSilicon ProcessingStatistical Process ControlAnalog and Digital Circuit DesignDevice Physics

About the role

Key responsibilities & impact

Lead DFT programs from chip-level DFT specification through implementation and verification to product release
Understand Broadcom and customer DFT feature requirements, DPPM goals, and define appropriate ASIC DFT specifications
Implement DFT, including Scan, MBIST, TAP, LBIST, IO, SerDes, and other IP DFT integration
Perform chip-level pattern generation and verification
Rapidly bring up products at ATE and provide RMA support
Work with STA and DI engineers on design closure for test and DFT mode timing closure with Physical Design and STA teams
Generate, verify, and debug test vectors before tape release
Validate and debug test vectors on ATE during silicon bring-up
Assist with silicon failure analysis, diagnostics, and yield improvement
Interface with customers and globally located physical design, test engineering, and manufacturing teams
Collaborate with IP DFT engineers and other stakeholders
Debug customer-returned parts on ATE
Innovate DFT solutions for testability challenges in 3nm and beyond
Automate DFT and test vector generation flows

Requirements

What you’ll need

Bachelors and 8+ years of related experience; or Masters degree and 6+ years of related experience
Strong DFT background, including IO and Analog DFT, ATPG and/or Scan, BIST, and others
Scan insertion and scan compression background, including DFT Compiler and Mentor TestKompress
Logic BIST design and debug experience
Experience in ATPG vector generation, simulation, and debugging using TetraMax or Fastscan
Experience in Verilog coding, testbench generation and simulation
Memory BIST insertion and verification experience on embedded SRAM, CAM, eDRAM, and ROM
Boundary scan verification and test vector generation
Good knowledge of IEEE1149.1 and IEEE1149.6
Basic knowledge of Test-STA and constraints
Strong background in IEEE1687, IJTAG, ICL, and PDL
Ability to work in a multi-disciplined, cross-department environment
Solid knowledge in analog and digital circuit design and device physics fundamentals
Good understanding of silicon processing, logical and physical synthesis, and transistor reliability principles
Excellent problem solving, debugging, root cause analysis, and communication skills
Strong understanding of statistical process control and data analysis techniques
Project management capabilities to track and prioritize competing deliverables across cross-functional stakeholders
Experience working on ATE is a plus
Experience with SerDes, DDR, PCIe, ENET, CXL IOBIST verification and silicon debug is a plus
Experience working on Tessent SSN is a plus

Benefits

Comp & perks

Discretionary annual bonus
Competitive new hire equity grant
Annual equity awards
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave
Vacation time
Paid Family Leave and other leaves of absence according to applicable laws