IC Design Engineer

Broadcom

. Execute physical design, synthesis, physical verification, and timing closure .

Posted 10/20/2026full-timeUnited StatesSeniorLeadWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in executing physical design processes, including RTL synthesis, timing closure, and EM/IR analysis, while collaborating effectively with IC Design RTL Engineers. Proficient in utilizing EDA tools and scripting languages to optimize design methodologies from RTL to silicon tape-out.

Highest-signal resume keywords

Physical Design ExecutionRTL SynthesisTiming Closure ExpertiseTCL/PERL ScriptingEDA Tools Proficiency

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Physical DesignRTL SynthesisTiming ClosureEM/IR AnalysisPlace And RouteClock Tree SynthesisFloor-PlanningLayout DesignFull Physical Design CycleTop-Level STA

Soft Skills

Excellent Verbal CommunicationExcellent Written Communication

Certifications & Qualifications

Bachelor’s Degree In Electrical EngineeringBachelor’s Degree In Electronics Engineering

Industry Keywords

IC DesignSilicon Tape-OutCustom Clock TreesInsertion ReductionSkew Balancing Techniques

Tech Stack

Tools & technologies

Perl

About the role

Key responsibilities & impact

Execute physical design, synthesis, physical verification, and timing closure
Set up and synthesize RTL
Perform timing closure through various methods and strategies
Conduct EM/IR analysis
Perform place and route
Execute clock tree synthesis
Perform floor-planning and layout
Develop flows and methodologies
Collaborate with IC Design RTL Engineers
Work in person at the Colorado Springs site

Requirements

What you’ll need

Bachelor’s degree required in Electrical Engineering or Electronics Engineering
8+ years of relevant experience
TCL/PERL scripting
Proficiency in related EDA tools
Full physical design cycle experience from RTL to tape-out
In-depth knowledge and expertise in physical design aspects of taking RTL to silicon tape-out
Experience with timing closure; top-level STA experience preferred
Experience with custom clock trees, insertion reduction and skew balancing techniques
Top-level floorplanning experience preferred
Excellent verbal and written communication skills

Benefits

Comp & perks

Discretionary annual bonus
Competitive new hire equity grant
Annual equity awards
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave and vacation time
Paid Family Leave and other leaves of absence in accordance with applicable laws