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Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates extensive expertise in Verilog/SystemVerilog RTL design and optimization, with a strong focus on high-performance implementations and collaboration across engineering disciplines. Proficient in addressing complex design challenges, including timing closure and low-power design strategies.
Highest-signal resume keywords
Verilog/SystemVerilog RTL ImplementationRTL Optimization StrategiesAsynchronous Clock Domain CrossingCollaboration with Engineering TeamsBachelor's Degree in Engineering
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
RTL DesignMicro-Architecture DevelopmentDebugging RTLHigh-Performance DesignLow-Power DesignComplex AlgorithmsPipeliningMulti-Threaded DesignsThird-Party IP IntegrationTiming Closure
Industry Keywords
Electrical EngineeringElectronics EngineeringComputer ScienceComputer EngineeringPCIe ProtocolCXL ProtocolAMBA ProtocolsRAID Storage DesignsPCIe Switch Designs
About the role
Key responsibilities & impact- Analyze high-level architecture specifications through interactive authoring and review
- Develop and document micro-architecture
- Implement high-quality, high-performance Verilog/SystemVerilog RTL from design specifications
- Work with asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multi-threaded designs, and third-party IP integration
- Converge designs to timing closure through RTL optimization strategies
- Debug RTL and develop robust RTL solutions
- Collaborate with Verification Engineering, Software/Firmware Engineering, Emulation Engineering, and Validation Engineering on RTL design issues
- Provide lab support as silicon progresses through validation
Requirements
What you’ll need- Bachelor’s degree required in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or equivalent Engineering degree
- 12+ years of relevant industry experience
- In-depth knowledge of implementation and supporting RTL designs using Verilog/SystemVerilog
- Must work in person; no remote work allowed
- Desired but not required: PCIe protocol
- Desired but not required: CXL protocol
- Desired but not required: AMBA protocols
- Desired but not required: RAID Storage designs
- Desired but not required: PCIe Switch designs
Benefits
Comp & perks- Discretionary annual bonus
- Competitive new hire equity grant
- Annual equity awards
- Medical plan
- Dental plan
- Vision plan
- 401(K) participation including company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave
- Vacation time
- Paid Family Leave and other leaves of absence in accordance with applicable laws
