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Broadcom

Memory System Designer, Place and Route Engineer

Broadcom

. Architect and design memory subsystems .

Posted 10/22/2026full-timeUnited StatesSeniorLead💰 $109,700 - $175,500 per yearWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates extensive expertise in architecting and designing memory subsystems, implementing RTL designs, and achieving design closure through proficient use of timing, DRC, LVS, and EM/IR tools. Strong capabilities in Verilog RTL coding, synthesis tools, and automation scripting are essential.

Highest-signal resume keywords
RTL Design ImplementationVerilog Coding ProficiencyPlace And Route ExpertiseDesign Closure AchievementSynthesis Tool Understanding

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Memory Subsystem ArchitectureRTL ImplementationVerilog RTL CodingPlace And RouteDesign ClosureGate Netlist SynthesisSTA ToolsDRC ToolsEM/IR ToolsLogical Equivalency Checking
Soft Skills
Good Communication SkillsInterpersonal SkillsLeadership SkillsMotivatedMultitasking Ability
Tools & Technologies
Synthesis ToolsAutomation ScriptsSTADRCEM/IR
Certifications & Qualifications
Bachelor In Electrical Engineering
Industry Keywords
Memory BehaviorDesign ClosurePhysical DesignTiming AnalysisDebugging

Tech Stack

Tools & technologies
Python

About the role

Key responsibilities & impact
  • Architect and design memory subsystems
  • Implement RTL of subsystem designs
  • Perform place and route (physical design)
  • Achieve design closure, including timing, DRC, LVS, and EM/IR
  • Perform gate netlist synthesis

Requirements

What you’ll need
  • Minimum of 8 years of relevant experience
  • Bachelor in Electrical Engineering
  • Strong design skills
  • Ability to write and debug Verilog RTL code
  • Place and route expertise
  • Proficient in running STA, DRC, EM/IR tools, and attaining design closure
  • Ability to code in Python
  • Good understanding of synthesis tools and running synthesis
  • Capable of running and debugging logical equivalency checkers
  • Familiar with memory behavior
  • Proficient in writing automation scripts and tools savvy
  • Good communication, interpersonal, and leadership skills
  • Motivated, self-driven, and good at multitasking

Benefits

Comp & perks
  • Discretionary annual bonus
  • Competitive new hire equity grant
  • Annual equity awards
  • Medical plans
  • Dental plans
  • Vision plans
  • 401(K) participation including company matching
  • Employee Stock Purchase Program (ESPP)
  • Employee Assistance Program (EAP)
  • Company paid holidays
  • Paid sick leave
  • Vacation time
  • Paid Family Leave and other leaves of absence according to applicable laws