RTL IC Design Engineer

Broadcom

. Analyze high-level architecture specifications through interactive authoring and review .

Posted 10/8/2026full-timeUnited StatesMid-LevelSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in Verilog/SystemVerilog RTL design and optimization, with a strong ability to analyze architecture specifications and develop micro-architectures. Collaborates effectively with cross-functional teams to resolve design issues and provide lab support during validation.

Highest-signal resume keywords

Verilog/SystemVerilog RTL ImplementationRTL Optimization StrategiesRTL Debugging SkillsMicro-Architecture DevelopmentCollaboration with Verification Teams

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

RTL DesignMicro-Architecture DevelopmentRTL OptimizationDebugging RTLHigh-Level Architecture Analysis

Soft Skills

CollaborationProblem-Solving

Tools & Technologies

Verification ToolsEmulation ToolsValidation Tools

Industry Keywords

Electrical EngineeringElectronics EngineeringComputer ScienceComputer EngineeringPCIe ProtocolCXL ProtocolAMBA ProtocolsRAID Storage DesignsPCIe Switch Designs

About the role

Key responsibilities & impact

Analyze high-level architecture specifications through interactive authoring and review
Develop and document micro-architectures
Implement high-quality, high-performance Verilog/SystemVerilog RTL from design specifications
Address asynchronous clock domain crossings, multiple power domains, low-power design, complex algorithms, deep computations and pipelining, multi-threaded designs, and third-party IP integration
Converge designs to timing closure through RTL optimization strategies
Debug RTL and develop robust RTL solutions
Collaborate with Verification, Software/Firmware, Emulation, and Validation Engineering teams to resolve RTL design issues
Provide lab support for silicon during validation

Requirements

What you’ll need

Bachelor’s degree required in Electrical Engineering, Electronics Engineering, Computer Science, Computer Engineering, or equivalent Engineering degree
5+ years of relevant industry experience
In-depth knowledge of implementation and supporting RTL designs using Verilog/SystemVerilog
Ability to analyze high-level architecture specifications
Ability to develop and document micro-architectures
Experience with RTL optimization strategies for timing closure
Superb RTL debugging skills
Ability to work with Verification, Software/Firmware, Emulation, and Validation Engineering teams
PCIe protocol, CXL protocol, AMBA protocols, RAID Storage designs, and PCIe Switch designs are desired but not required

Benefits

Comp & perks

Discretionary annual bonus
Competitive new hire equity grant
Annual equity awards
Medical, dental and vision plans
401(K) participation including company matching
Employee Stock Purchase Program (ESPP)
Employee Assistance Program (EAP)
Company paid holidays
Paid sick leave
Vacation time
Paid Family Leave and other leaves of absence in accordance with applicable laws