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Cirrus Logic

DFT Engineer

Cirrus Logic

. Perform initial test planning for mixed-signal audio development .

Posted 10/27/2026full-timeUnited StatesJuniorMid-LevelWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in ASIC DFT design and verification, with a strong focus on mixed-signal audio development and test planning. Proficient in using industry-standard EDA tools and programming languages to enhance test coverage and support silicon bring-up.

Highest-signal resume keywords
ASIC DFT Design And VerificationEDA Tools For DFTMemory BIST LogicVerilog, SystemVerilog, Or VHDLTest Cost Planning And Analysis

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
DFT Features ImplementationScan InsertionATPG Pattern GenerationTiming Constraints DevelopmentGate-Level SimulationsLow-Power Test TechniquesSynthesisStatic Timing AnalysisDebugging Silicon ProblemsAutomation Flows
Soft Skills
Strong Oral CommunicationStrong Written Communication
Tools & Technologies
FastScanTestKompressTetraMAXTest CompilerPythonPerlTCL
Certifications & Qualifications
MSEEBS In Relevant Industry Experience
Industry Keywords
Mixed-Signal SoCsConsumer Mobile Audio MarketsTest Coverage GapsSilicon Bring-UpTechnical Data Access

Tech Stack

Tools & technologies
PerlPython

About the role

Key responsibilities & impact
  • Perform initial test planning for mixed-signal audio development
  • Define, implement, and review DFT features within a collaborative team
  • Generate, insert, and verify Memory BIST logic
  • Perform scan insertion and ATPG pattern generation
  • Develop and review DFT timing and equivalence-checking constraints
  • Verify MBIST and ATPG patterns with gate-level simulations
  • Identify and improve test coverage gaps
  • Perform test cost planning and analysis
  • Deliver MBIST and ATPG patterns to the product test group
  • Support silicon bring-up on the ATE
  • Work on mixed-signal SoCs for consumer mobile audio markets and support expanding product lines

Requirements

What you’ll need
  • MSEE with 2+ years of experience or BS with relevant industry experience
  • Strong hands-on working knowledge of ASIC DFT design and verification
  • Experience with industry-standard EDA tools for DFT such as FastScan, TestKompress, TetraMAX, Test Compiler, etc.
  • Candidates must be able to access technical data without a requirement for an export license
  • Cirrus Logic is unable to sponsor or obtain export licenses for this role
  • Preferred: Experience with Verilog, SystemVerilog, or VHDL
  • Preferred: Understanding of low-power test techniques and architectures
  • Preferred: Knowledge of Perl, Python, or TCL
  • Preferred: Experience with synthesis, static timing analysis, and developing timing constraints
  • Preferred: Strong oral and written communication skills
  • Preferred: Experience with flows and automation
  • Preferred: Experience with debugging and root-causing silicon problems

Benefits

Comp & perks
  • Full-time employment
  • Hybrid work arrangement
  • Inclusive and fair workplace culture
  • Meaningful community engagement
  • Enjoyable employee experiences
  • Career growth opportunities