Principal AI, Secure Platform Architect

Cirrus Logic

. Architect a unified compilation and deployment framework spanning embedded firmware, DSP algorithms, ML models, and FPGA RTL configurations .

Posted 11/6/2026full-timeAustin • Texas • United StatesLeadWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in compiler development, embedded systems, and heterogeneous computing, with a strong focus on architecting secure, cloud-native developer platforms and integrating advanced AI-driven workflows. Proficient in optimizing complex systems for performance, security, and scalability while ensuring compliance with software supply-chain security practices.

Highest-signal resume keywords

Compiler DevelopmentLLVM/MLIR/GCCCloud-Native Developer PlatformsC/C++/Python ProficiencySecure Software Development Practices

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Compiler DesignCode GenerationOptimizationRuntime SystemsProcessor MicroarchitectureDSP ProgrammingML Inference DeploymentFPGA DevelopmentAPIsSDKs

Soft Skills

Autonomous OperationCross-Disciplinary CollaborationInfluencing Decisions

Tools & Technologies

CI/CD PipelinesBuild SystemsDistributed Development InfrastructureAI AgentsAutomated Engineering Workflows

Certifications & Qualifications

Export-Control Eligibility

Industry Keywords

Embedded SystemsHeterogeneous ComputingSecure Build EnvironmentsSoftware Supply-Chain SecurityDeveloper Ecosystems

Tech Stack

Tools & technologies

CloudPythonPyTorchTensorflowC++

About the role

Key responsibilities & impact

Architect a unified compilation and deployment framework spanning embedded firmware, DSP algorithms, ML models, and FPGA RTL configurations
Develop and integrate compiler frontends, intermediate representations, optimization passes, backends, and runtime frameworks for heterogeneous compute resources
Collaborate with silicon architects to optimize instruction sets, custom operators, accelerator interfaces, memory architecture, workload partitioning, and system-level power, performance, and area
Establish common abstractions for execution, interoperability, and data movement across CPUs, DSP engines, ML accelerators, and configurable logic
Build a headless, AI-agent-driven development platform that converts natural-language application intent into compiled, validated, and deployable hardware/software pipelines
Use LLMs and agentic workflows to automate code generation, workload partitioning, compiler optimization, build orchestration, simulation, testing, and debugging
Integrate heterogeneous programming environments into a unified toolchain from application and model development through executable binaries and programmable-logic configurations
Establish reproducible, deterministic build and validation processes and integrate compilation, simulation, debugging, profiling, and validation into an AI-orchestrated workflow
Architect and own a secure, cloud-native, multi-tenant development environment for Cirrus, third-party IP providers, and customers
Establish an end-to-end secure software development lifecycle covering IP onboarding, development, compilation, integration, simulation, validation, artifact signing, secure distribution, deployment, and lifecycle updates
Design tenant isolation, identity and access controls, encryption, secrets management, and protected build and execution environments
Establish software provenance, integrity verification, secure boot and provisioning interfaces, and chain-of-trust mechanisms from cloud infrastructure to silicon execution
Enable controlled cross-vendor collaboration, debugging, profiling, and system-level simulation with auditable software supply chains
Partner with SoC architects, ML engineers, DSP specialists, embedded software teams, and security experts on platform architecture
Evaluate and integrate compiler frameworks, AI development technologies, simulation platforms, and secure cloud infrastructure
Drive architectural decisions, develop prototypes, and establish the foundation for a scalable third-party developer ecosystem
Operate autonomously in an early-stage innovation environment, balancing long-term architecture with rapid experimentation and execution
Establish software foundations that make advanced compute platforms more accessible, programmable, and scalable, improving developer productivity and accelerating innovation

Requirements

What you’ll need

Master's or Ph.D. in Computer Science, Electrical Engineering, Computer Engineering, or a related field, or equivalent technical expertise, with 10+ years of relevant experience in compiler development, embedded systems, heterogeneous computing, or developer platforms
Deep knowledge of compiler design, code generation, optimization, runtime systems, and processor microarchitecture
Hands-on experience in LLVM, MLIR, GCC, or comparable compiler infrastructure
Strong experience with ARM embedded development
Exposure to DSP programming, ML inference deployment, accelerator mapping, and FPGA development flows
Experience architecting cloud-native developer platforms, multi-tenant infrastructure, secure build environments, CI/CD pipelines, and software supply-chain security
Understanding of secure software development practices, workload isolation, cryptographic signing, software provenance, trusted execution, secure deployment, and protection of third-party intellectual property
Demonstrated experience applying LLMs, AI agents, and automated engineering workflows to software development, compilation, testing, or complex toolchain orchestration
Strong proficiency in C/C++, Python, APIs, SDKs, build systems, and distributed development infrastructure
Proven ability to architect and deliver complex, cross-disciplinary systems, operate independently, and influence decisions spanning silicon, software, security, and customer experience
Export-control eligibility: must be able to access technical data without Cirrus Logic first obtaining an export license; Cirrus Logic is unable to sponsor or obtain export licenses for this role
Preferred: experience with compilers/runtimes for NPUs, AI accelerators, DSPs, GPUs, or custom processors; ML frameworks such as TVM, IREE, ONNX, TensorFlow Lite, or PyTorch; FPGA synthesis, hardware/software co-simulation, virtual platforms, and performance modeling; secure multi-party development platforms, confidential computing, hardware roots of trust, or protected IP ecosystems; semiconductor startups, emerging compute architectures, developer ecosystems, or early-stage technology incubation