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Codasip

Verification Engineer

Codasip

. Verify RISC-V processors and extensions .

Posted 10/1/2026full-timeBrno • CzechiaMid-LevelSeniorWebsite

Core Competencies

Role fit
Core Competencies

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Demonstrates expertise in verifying RISC-V processors and complex CPU architectures, utilizing functional verification methodologies and automation tools. Proficient in developing verification solutions and collaborating effectively across teams to ensure high-quality outcomes.

Highest-signal resume keywords
RISC-V Processor VerificationSystemVerilog ProgrammingFunctional Verification MethodologiesLinux AutomationVersion Control with Git

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
Functional VerificationTest Bench DevelopmentSimulation and DebuggingRoot Cause AnalysisCode Writing in PythonCode Writing in C++Code Writing in RustTest GenerationCoverage CollectionGate-Level Simulation
Soft Skills
Analytical ThinkingTeam Collaboration
Tools & Technologies
SimulatorsGitSVN
Industry Keywords
CPU ArchitectureASIC VerificationVerification MetricsDesign Block OwnershipComplex State-of-the-Art CPUs

Tech Stack

Tools & technologies
LinuxPythonRustSubversionC++

About the role

Key responsibilities & impact
  • Verify RISC-V processors and extensions
  • Develop verification solutions, including test benches, test bench components, stimulus generation, and formal environments
  • Collaborate with engineers responsible for verification activities for components or subsystems from start to finish
  • Define verification strategies for blocks and subsystems and select appropriate tools
  • Review technical specifications and provide verification-focused feedback
  • Run simulations, identify bugs, and perform root cause analysis of complex issues
  • Define, estimate, prioritize, and track assigned work
  • Track and report verification metrics
  • Create automated verification flows
  • Verify complex state-of-the-art CPUs, including advanced out-of-order processors
  • Take ownership of portions of the design and apply multiple verification methodologies

Requirements

What you’ll need
  • Currently located in and with working rights in the Czech Republic
  • Commercial experience with functional processor verification methodologies applied to CPU or other ASIC verification, including simulators, test generation, coverage collection, and gate-level simulation
  • Knowledge of verifying CPU architectures or other IP
  • Ability to write clear and concise code in SystemVerilog, Python, C++, Rust, or similar languages
  • Past verification ownership of a design block
  • User knowledge of Linux for automating common tasks
  • Knowledge of versioning tools such as Git and SVN
  • Knowledge of RISC-V Architecture
  • Good knowledge of computer systems and architecture
  • Analytical thinking and team collaboration skills
  • Ability to work effectively across teams to debug issues and find root causes

Benefits

Comp & perks
  • No benefits, perks, or compensation extras are specified in the posting