FREE ACCESS
5,000–10,000 jobs/day
See all jobs on Scoutfield
Search thousands of fresh jobs every day.
Discover
- Fresh listings
- Fast filters
- No subscription required
Create a free account and start exploring right away.

Senior Hardware Engineer – RTL, High-Level Synthesis
Code Metal. Develop C++ and post-HLS readability and optimization passes to produce human-auditable RTL .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in developing C++ and RTL code, with a strong focus on High-Level Synthesis and verification methodologies. Proficient in scripting with Python for automation and testing within CI/CD environments, while possessing a solid understanding of hardware modeling and FPGA architectures.
Highest-signal resume keywords
C++ DevelopmentHigh-Level Synthesis (HLS)RTL Code GenerationPython ScriptingFunctional Verification
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
RTL CodingHardware ModelingFixed-Point ArithmeticBit-Accurate TypesSynthesis PragmasDebuggingSimulation FlowsVHDLDSP AlgorithmsTestbench Development
Soft Skills
Problem-SolvingCollaboration
Tools & Technologies
CatapultVitis HLSStratusLinux Development EnvironmentGitCI/CD
Certifications & Qualifications
U.S. CitizenshipU.S. Security Clearance
Industry Keywords
Agentic AICode MetalProduction-Ready RTLFPGA Architectural CapabilitiesLLM-Assisted Code Transformation
Tech Stack
Tools & technologiesLinuxPythonC++
About the role
Key responsibilities & impact- Develop C++ and post-HLS readability and optimization passes to produce human-auditable RTL
- Leverage Agentic AI and verification capabilities within Code Metal
- Contribute to CI/CD qualification, including automated RTL simulation, functional verification, and regression testing
- Architect and expand capabilities for creating production-ready RTL from high-level algorithm descriptions
- Integrate HLS and support RTL code generation
- Collaborate across hardware, software, and verification disciplines
Requirements
What you’ll need- 3+ years of hands-on experience with writing RTL code or using High-Level Synthesis
- Experience with at least one commercial HLS tool (Catapult, Vitis HLS, Stratus, or equivalent)
- Solid hardware modeling background regarding fixed-point arithmetic, bit-accurate types, synthesis pragmas and modeling trade-offs
- Scripting experience in Python for development, toolchain automation and testing
- Strong debugging and problem-solving skills
- Experience with simulation and functional verification flows
- Experience using Linux-based development environments
- Solid understanding of RTL / VHDL
- Understanding of FPGA architectural capabilities and constraints
- Knowledge of verification methodologies and testbench development
- Experience with DSP algorithms and applications using Python/MATLAB
- Interest in or familiarity with LLM-assisted code transformation and readability tooling
- Experience with Git-based development workflows and CI/CD environments
- U.S. citizenship may be required for certain project assignments involving security clearance
- Legal authorization to work in the United States and ability to obtain and maintain a U.S. security clearance may be required for certain assignments
Benefits
Comp & perks- Health care plan with 100% premium coverage, including medical, dental, and vision
- 401k with 5% matching
- Paid Time Off (uncapped vacation, plus sick and public holidays)
- Flexible hybrid or remote work arrangement
- Relocation assistance for qualifying employees
- Pay strives to be at the upper end of the salary range