Layout Engineering Lead

Coherent Corp.

. Lead physical layout development for III-V semiconductor laser products, including VCSELs, DFB lasers, photonic devices, and related optoelectronic technologies .

Posted 10/8/2026full-timeSherman • Texas • United StatesSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in semiconductor layout design, particularly with III-V optoelectronic devices, and possesses strong skills in mask design, layout automation, and process control methodologies. Proficient in collaborating with cross-functional teams to drive product development and ensure high-quality manufacturing standards.

Highest-signal resume keywords

Semiconductor Layout DesignIII-V Optoelectronic DevicesMask DesignLayout AutomationPython Programming

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Semiconductor Layout DesignMask DesignDesign Rule Checks (DRC)Layout Versus Schematic (LVS)Process Control Monitor (PCM) StructuresStatistical Analysis ToolsCustom Verification ToolsAutomated Design Rule ChecksPython ProgrammingC++ Programming

Soft Skills

MentoringCollaborationTechnical Guidance

Tools & Technologies

SilvacoCadenceKLayoutSynopsysMentor Graphics/Siemens EDA

Industry Keywords

III-V SemiconductorVCSELDFB LaserPhotonic Integrated Circuits (PICs)Semiconductor Fabrication ProcessesCleanroom OperationsEHS Procedures

Tech Stack

Tools & technologies

PerlPythonC++

About the role

Key responsibilities & impact

Lead physical layout development for III-V semiconductor laser products, including VCSELs, DFB lasers, photonic devices, and related optoelectronic technologies
Own layout architecture, mask design, and mask data preparation from concept through production release
Develop, maintain, and improve design rule methodologies, verification flows, and layout standards
Design process monitor structures, test patterns, and characterization vehicles for process development, process control, yield improvement, and reliability monitoring
Develop automated DRC, LVS, verification, and data analysis solutions
Champion layout automation to improve productivity, consistency, quality, and cycle time
Collaborate with process integration, device engineering, epitaxy, manufacturing, and product engineering teams
Drive layout and cross-functional design reviews through product development and qualification
Support root cause investigations and failure analysis involving layout-related issues
Establish and maintain layout guidelines, libraries, reusable cells, and best practices
Coordinate mask revisions and change management while maintaining configuration control and documentation accuracy
Lead multifunctional teams in resolving layout, manufacturability, and process integration challenges
Mentor layout engineering technicians and provide technical guidance

Requirements

What you’ll need

Bachelor's, Master's, or Ph.D. degree in Electrical Engineering, Physics, Materials Science, Optical Engineering, or a related technical field
Minimum 5 years of semiconductor layout design experience required
Minimum 3 years of direct experience with III-V optoelectronic devices such as VCSELs, DFB lasers, edge-emitting lasers, photonic integrated circuits (PICs), or similar technologies preferred
Demonstrated experience developing production mask sets and managing layout releases for semiconductor products
Experience designing process control monitor (PCM) structures, test keys, and process characterization patterns
Strong understanding of semiconductor fabrication processes and how process interactions impact physical layout and device performance
Expert-level experience with semiconductor layout tools, preferably Silvaco; equivalent EDA platforms such as Cadence, KLayout, Synopsys, Mentor Graphics/Siemens EDA, or similar tools considered
Strong understanding of physical layout design principles, mask design, DRC, LVS, and semiconductor manufacturing constraints
Proficiency in Python, Tcl, Perl, C++, or similar languages
Experience developing custom verification tools, automated design rule checks, layout generators, or workflow automation solutions
Hands-on experience with VCSEL, DFB laser, PIC, or related optoelectronic device layouts
Strong knowledge of lithography, etch, metallization, dielectric deposition, implantation, and other semiconductor fabrication processes
Familiarity with semiconductor manufacturing operations, process control methodologies, and change management systems
Experience with statistical analysis tools such as JMP, Minitab, or equivalent is a plus
Ability to work in a class 100/1000 clean room and wear full cleanroom attire
Ability to work with and/or around chemicals
Ability to stand and sit for up to 4 hours at a time
Ability to lift and push/pull 16–30 pounds
Must follow site EHS procedures and Coherent Corp. Corporate EHS standards

Benefits

Comp & perks

Competitive compensation program
Career development platform
Stability, longevity and growth opportunities
Equal opportunity/affirmative action employment
Disability accommodations available