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Senior ASIC Verification Engineer
Cornelis Networks. Define overall SoC-level verification strategy, technical planning, and direction .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in SoC-level verification strategy and technical planning, with hands-on experience in UVM/SystemVerilog and complex SoC verification. Proven ability to lead teams, mentor members, and utilize AI tools to enhance productivity and efficiency.
Highest-signal resume keywords
UVM/SystemVerilog CodingSoC Verification ExperienceDebugging with VerdiTestbench DevelopmentAI Tools Utilization
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
UVM/SystemVerilogSoC VerificationDebuggingTestbench DevelopmentFunctional TestingCoding GuidelinesRevision Control (Git, SVN)Scripting Languages (TCL, Python, Perl, Shell)Coverage ClosureFirst-Pass Success
Soft Skills
MentoringCoachingCollaborationLeadershipGuidance
Tools & Technologies
VCSVerdiAI ToolsSimulation ToolsEmulation Tools
Industry Keywords
Networking Hardware VerificationEthernet MAC/PCS ProtocolsTCP/IPRDMA/RoCEIPSecASIC VerificationSilicon Validation
Tech Stack
Tools & technologiesPerlPythonShell ScriptingSubversionTCP/IP
About the role
Key responsibilities & impact- Define overall SoC-level verification strategy, technical planning, and direction
- Enable and drive development of UVM environments to verify RTL at block, unit, and SoC levels
- Develop and execute functional tests according to verification test plans
- Instrument testbenches for functional and code coverage and drive coverage closure
- Collaborate with design, software, emulation, and silicon validation teams to ensure high design quality
- Provide day-to-day guidance and leadership to team members
- Drive results through mentoring, coaching, and counseling
- Educate the team on using AI tools to improve productivity and efficiency
- Generate and enforce coding and verification guidelines
- Take responsibility for verification closure of entire projects, including design modules, sub-systems, and SoCs
- Help create first-pass silicon success
Requirements
What you’ll need- 8+ years of experience
- Hands-on experience writing code using UVM/SystemVerilog
- Verification experience for complex SoCs with multiple clock and reset domains using VCS or equivalent simulation tools
- Ability to debug failures to the RTL line and close out bug fixes using Verdi or equivalent debug tools
- Experience in ground-up testbench development
- Experience with revision control systems such as Git or SVN
- B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
- Preferred: 8+ years of relevant experience in networking hardware verification
- Preferred: expertise verifying 50G, 100G, or 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, and IPSec
- Preferred: one or more scripting languages (TCL, Python, Perl, Shell scripting)
- Preferred: track record of first-pass success in ASIC and systems
- Experience utilizing AI tools to generate test plans and improve verification productivity is highly desirable
- Employees must reside within the United States
Benefits
Comp & perks- Equity, cash, and incentives
- Health benefits
- Retirement benefits
- Medical coverage
- Dental coverage
- Vision coverage
- Disability insurance
- Life insurance
- Dependent care flexible spending account
- Accidental injury insurance
- Pet insurance
- Generous paid holidays
- 401(k) with company match
- Open Time Off (OTO) for regular full-time exempt employees
- Sick time
- Bonding leave
- Pregnancy disability leave
- Dynamic, flexible work environment
- Opportunity to collaborate with influential names in the semiconductor industry