Principal ASIC/System-on-Chip Engineer

Frontgrade Gaisler

. Participate in the complete development process of space microprocessor System-on-Chip designs, from architectural design through development and verification to implementation and prototype validation .

Posted 10/14/2026full-timeGothenburg • SwedenLeadWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in ASIC and FPGA development, including RTL design, verification, and implementation, with a strong focus on System-on-Chip architecture and integration. Proven ability to lead technical projects and contribute to advanced microprocessor designs for space applications.

Highest-signal resume keywords

ASIC Development ExperienceRTL Design and VerificationVHDL or Similar HDL ProficiencySystem-on-Chip ArchitectureFPGA Implementation and Validation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

ASIC DevelopmentRTL DesignVerificationImplementationVHDLFPGASynthesisDFTPhysical DesignMicroprocessor Design

Soft Skills

Technical LeadershipProject Coordination

Tools & Technologies

SynopsysCadence

Industry Keywords

System-on-ChipIP Core IntegrationRISC-V ArchitectureSPARC ArchitectureRadiation-Tolerant DesignFault-Tolerant Design

About the role

Key responsibilities & impact

Participate in the complete development process of space microprocessor System-on-Chip designs, from architectural design through development and verification to implementation and prototype validation
Perform design space exploration and architectural design of advanced microprocessors
Integrate and verify System-on-Chip designs
Implement designs in target technologies, including ASIC and FPGA
Lead technical aspects of projects, including design space exploration and technical coordination
Contribute to company workflows
Develop advanced FPGA and ASIC solutions used in real space missions

Requirements

What you’ll need

M.Sc. or Ph.D. in Electrical Engineering, Computer Engineering, or a related field
At least 10 years of ASIC development experience, including SoC architecture
Experience integrating IP Cores into a SoC with high-performance functions and interfaces
Extensive experience in RTL design, verification, and implementation
Hands-on experience with synthesis (Synopsys or Cadence), DFT, and physical design
Strong skills in VHDL or similar HDL
Strong advantage: hands-on experience with measurements and fault tracing on FPGA or ASIC-based designs
Strong advantage: knowledge of microprocessor design and the RISC-V or SPARC architectures
Strong advantage: experience from advanced ASIC nodes
Strong advantage: experience with radiation-tolerant or fault-tolerant design

Benefits

Comp & perks

Hybrid work model, up to two days per week remote
Remote position within Sweden with regular visits to the office can also be considered
Private health care insurance
Regular health check-ups
Annual wellness allowance of 5,000 SEK
Central office location
Continuous learning, hands-on projects, and a supportive network for personal and professional development