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General Dynamics Mission Systems

Advanced ASIC FPGA Verification Engineer

General Dynamics Mission Systems

. Define, design, verify, and document ASIC and/or FPGA developments .

Posted 11/10/2026full-timeRemote • Arizona • United StatesMid-LevelSenior💰 $122,785 - $136,215 per yearWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in ASIC and FPGA development, including RTL simulation, SystemVerilog programming, and UVM testbench architecture. Proficient in project planning, team collaboration, and applying innovative solutions to enhance engineering processes.

Highest-signal resume keywords
ASIC/FPGA DevelopmentRTL Simulation ToolsSystemVerilog ProgrammingUVM Testbench ArchitectureLinux Environment Experience

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
ASIC/FPGA Design PrinciplesSystemVerilog Object-Oriented ProgrammingUVM Agents and Bus Functional ModelsConstrained Random TestingRegister Abstraction LayerLinux Shell ScriptsTCLPythonHigh-Speed Interface DesignDigital Circuit Analysis
Soft Skills
LeadershipCreative ThinkingMultitaskingEffective CommunicationProblem-Solving
Tools & Technologies
Siemens Mentor Graphics QuestaModelsimFormal Verification ToolsGitLabMicrosoft Office
Certifications & Qualifications
U.S. Department of Defense TS/SCI Security Clearance
Industry Keywords
ASIC Development Life CycleVerification StrategiesEmbedded Micro-Processing SystemsDSP FunctionsPCIeAXI ProtocolsSpace WireEthernet Interfaces

Tech Stack

Tools & technologies
LinuxPythonTypeScript

About the role

Key responsibilities & impact
  • Define, design, verify, and document ASIC and/or FPGA developments
  • Determine architecture, system simulation, and detailed design approaches
  • Define module interfaces and all aspects of device design and simulation
  • Create test and simulation plans establishing functional criteria
  • Verify test results and analyze performance
  • Review vendor capabilities and simulation tools as needed
  • Participate in improving ASIC/FPGA organizational processes
  • Generate technical engineering products using appropriate standards, processes, procedures, and tools throughout the ASIC/FPGA development life cycle
  • Provide leadership and/or direction to lower-level employees as needed
  • Independently determine approaches to solutions
  • Contribute to major programs and projects
  • Plan and execute project tasks
  • Operate in a team environment and collaborate with project leaders, engineering teams, internal work groups, and external customers
  • Keep abreast of technology trends and identify opportunities to apply AI for continuous improvement and innovation

Requirements

What you’ll need
  • Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering, Technology or Mathematics field, and 5+ years of job-related experience; or a Master's degree and 3 years of job-related experience
  • Ability to obtain a U.S. Department of Defense TS/SCI security clearance within a reasonable amount of time from date of hire
  • Eligibility requirements for access to classified information
  • U.S. citizenship required
  • In-depth experience using RTL simulation tools such as Siemens Mentor Graphics Questa or Modelsim, or equivalent, in a Linux environment
  • In-depth knowledge of SystemVerilog object-oriented programming and UVM
  • Understanding of UVM testbench architectures
  • Experience using and developing UVM agents and bus functional models
  • Understanding of coverage, cover classes, and cover points
  • Experience with predictive testbench components, functional coverage, and assertions
  • Experience with constrained random testing
  • Experience with the Register Abstraction Layer
  • Familiarity with requirements-based verification, requirement tracing, and verification strategies
  • Experience with Linux shell scripts, TCL, and Python
  • Familiarity with Formal Verification tools, code coverage, and writing waivers
  • Familiarity with QVIP
  • Experience developing UVM testbenches for Xilinx devices with Xilinx IP and SoCs
  • Knowledge of AXI protocols, PCIe, Space Wire, and Ethernet interfaces
  • Knowledge of DSP functions and common signal processing components
  • Familiarity with debugging FPGA/ASIC hardware and assisting with HW/SW integration
  • Familiarity with continuous integration features of GitLab
  • Proficient use and understanding of ASIC/FPGA engineering concepts, principles, and theories
  • Proficient in ASIC/FPGA design principles and design processes
  • Proficient in Microsoft Office applications
  • Proficient written and verbal communication skills
  • Ability to think creatively and multitask
  • Proficient skill in communicating issues, impacts, and corrective actions
  • Clear understanding of embedded micro-processing systems, FPGA design and verification using VHDL, and digital circuit analysis and design
  • Experience designing high-speed interfaces and complex memory designs

Benefits

Comp & perks
  • Sign-on bonus available
  • Continuous learning and development opportunities
  • Research-oriented work alongside award-winning teams
  • Flexible schedules with every other Friday off work, if desired (9/80 schedule)
  • 401k matching
  • Flex time off
  • Paid parental leave
  • Healthcare benefits
  • Health & wellness programs
  • Employee resource and social groups
  • Flexible work environment