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Intel Corporation

CPU Layout Design Engineer

Intel Corporation

. Drive custom layout design for memory compilers, custom IPs, and partitions supporting CPU products .

Posted 10/7/2026full-timePenang • MalaysiaMid-LevelSeniorWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in physical design, layout verification, and VLSI/CMOS circuit design, with a strong focus on optimizing design workflows and methodologies. Proficient in collaborating with cross-functional teams to enhance circuit designs and troubleshoot complex technical issues.

Highest-signal resume keywords
Physical DesignVLSI DesignCMOS Logic Circuit DesignUNIX Shell ScriptingTCL Programming

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Layout DesignArea OptimizationCritical Wire AnalysisLayout VerificationDesign Rule ComplianceElectron Migration AnalysisVoltage Drop AnalysisSelf-Heating AnalysisCustom AutoroutersCustom Placers
Soft Skills
Problem SolvingCommunicationInterpersonal SkillsMultitaskingCollaboration
Industry Keywords
Memory CompilersSoC Integration StandardsDesign MethodologiesCircuit EnhancementDesign Workflows

Tech Stack

Tools & technologies
ElectronPerlShell ScriptingUnix

About the role

Key responsibilities & impact
  • Drive custom layout design for memory compilers, custom IPs, and partitions supporting CPU products
  • Perform physical array planning, area optimization, and critical wire analysis
  • Conduct complete layout verification for design rule compliance, SoC integration standards, electron migration, voltage drop (IR), and self-heating
  • Utilize custom autorouters and placers for layout construction
  • Innovate methods to improve productivity and design quality
  • Collaborate with circuit design engineers to assess feasibility, provide feedback, and implement circuit enhancement requests
  • Troubleshoot design, tool flow, and methodology issues
  • Partner with cross-site teams on design strategies, reuse methodologies, and project consistency

Requirements

What you’ll need
  • Bachelor's or Master's degree in Electronics/Microelectronics Engineering, Computer Engineering, or a related discipline
  • 3+ years of hands-on experience in physical design, demonstrated through internships, academic projects, coursework, or hands-on training
  • Proficiency in Very Large Scale Integration (VLSI) and Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design
  • Programming skills in UNIX shell scripting, TCL, and Perl
  • Strong ability to analyze and solve complex technical problems independently
  • Excellent communication, interpersonal, and multitasking skills
  • Ability to collaborate across functions and teams
  • Prior experience developing innovative layout methodologies and improving design workflows

Benefits

Comp & perks
  • Hybrid work model allowing employees to split time between working on-site at the assigned Intel site and off-site