Graduate Talent – CPU-SoC Silicon Design

Intel Corporation

. Participate in training, design, and development of next-generation SOC/CPU for a wide range of Intel products .

Posted 11/2/2026contractPenang • MalaysiaEntry LevelWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in VLSI CMOS IC design, including structural physical design methodologies and high-speed clocking circuit design. Proficient in using CAD tools for simulation and verification of circuit performance across various Intel products.

Highest-signal resume keywords

VLSI CMOS IC DesignRegister Transfer Level (RTL) Model ValidationCAD Tools ProficiencyHigh-Speed Clocking Circuit DesignSystem Integration

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

VLSI DesignCMOS Logic Circuit DesignPhysical Layout DesignSynthesisTiming BudgetingPlace and RouteRC ExtractionAnalog IP DevelopmentFunctional VerificationTiming Closure

Tools & Technologies

UNIXC ProgrammingCAD ToolsLPDDREMMCSATAUFSPCIeUSBMIPI

Certifications & Qualifications

Bachelor of Engineering DegreeMaster of Science Degree

Industry Keywords

SOCCPUDeep Sub-MicronSilicon IntegrationFirmwareMiddlewareDriversOperating SystemsAndroidWindows

Tech Stack

Tools & technologies

AndroidUnix

About the role

Key responsibilities & impact

Participate in training, design, and development of next-generation SOC/CPU for a wide range of Intel products
Assist the design unit owner with Register Transfer Level (RTL) model functional validation
Use CAD tools to simulate logic behavior and circuit performance and guide physical design for next-generation deep sub-micron embedded circuit solutions
Verify circuit behavior against the original simulation model and first silicon
Define VLSI structural design methodology and develop design flows
Implement structural physical designs, including synthesis, floor planning, power-grid and clock-tree design, timing budgeting and closure, place and route, RC extraction, and integration
Verify structural physical designs for functional equivalency, timing/performance, noise, layout design rules, reliability, and power
Develop analog IP on next-generation deep-submicron processes for Intel SOCs
Perform VLSI CMOS IC design, solid-state physics, and physical layout tasks
Design high-speed clocking circuits such as PLL, DLL, and bandgap circuits, or high-voltage I/O such as DDR/LPDDR, GPIO, and OPIO
Integrate third-party IPs through synthesis, functional and/or timing convergence, and pre- and post-silicon debugging
Handle signals crossing power planes and clock domains
Work with industry-standard protocols and interfaces including LPDDR, eMMC, SATA, UFS, PCIe, USB, and MIPI
Perform system integration involving silicon, platform, firmware, middleware, drivers, operating systems, and applications on Android- and Windows-based tablets and phones

Requirements

What you’ll need

Bachelor of Engineering degree or Master of Science degree in Electronic, Electrical or Computer Engineering
Familiarity with Very Large Scale Integration (VLSI) Complementary Metal-Oxide Semiconductor (CMOS) logic circuit design
Well versed in UNIX, C programming and relevant Computer Aided Design (CAD) tools

Benefits

Comp & perks

Hybrid work model allowing employees to split their time between working on-site at their assigned Intel site and off-site