HLD Validation Technical Lead

Intel Corporation

. Research, design, develop, and optimize software tools that enable the use of Field Programmable Gate Arrays (FPGA) .

Posted 10/19/2026full-timePenang • MalaysiaSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in FPGA development and software-tool verification, with a strong focus on validation strategies, automation, and technical leadership. Proficient in collaborating with cross-functional teams to optimize FPGA architectures and tool flows while ensuring high-quality release assessments.

Highest-signal resume keywords

FPGA DevelopmentTechnical LeadershipValidation StrategiesScripting and AutomationHLD Tool Experience

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

FPGA Design FlowsValidation PlansRegression SuitesDefect ReportsFPGA ArchitecturesDebugging Cross-Layer SoftwarePerformance CharacterizationAI Model BenchmarkingUI AutomationFPGA Development Kits

Soft Skills

CollaborationMentoringWritten CommunicationVerbal Communication

Tools & Technologies

Altera/Intel Quartus PrimePythonPerlTclCI/CDLinuxWindowsContainersVirtual MachinesPlaywright

Industry Keywords

Electrical EngineeringComputer EngineeringSoftware EngineeringDeep LearningDSP AlgorithmsData AnalyticsSoC IntegrationPCIeEmbedded FlowsHigh-Level Synthesis

Tech Stack

Tools & technologies

LinuxPerlPythonSelenium

About the role

Key responsibilities & impact

Research, design, develop, and optimize software tools that enable the use of Field Programmable Gate Arrays (FPGA)
Develop and optimize compilers, flows, assemblers, models, tools, runtimes, and/or firmwares closely coupled to FPGA silicon, IP, and boards
Leverage knowledge of FPGA hardware, logic design, board design, semiconductor devices, and chip layout
Design, develop, and optimize software abstractions and frameworks for FPGA acceleration in domains such as deep learning, DSP algorithms, or data analytics
Respond to customer/client requests or events as they occur
Align validation coverage and release criteria with HLD product requirements, customer workflows, and release commitments
Identify, communicate, and resolve critical defects and coverage gaps or provide explicit release dispositions
Maintain reliable, maintainable regressions, environments, and reports
Improve repeatability, coverage, triage speed, and reporting consistency through automation
Provide timely, evidence-based assessments of validation status and release risk
Provide technical guidance to validation engineers and support their growth in ownership

Requirements

What you’ll need

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, Software Engineering, or a related field
8+ years of experience in FPGA development, software-tool verification, or validation, including substantial hands-on work with FPGA design flows
3+ years of technical leadership, project leadership, or equivalent experience guiding engineers and coordinating complex validation work
Strong understanding of FPGA architectures and tool flows from design entry through compilation, simulation, implementation, timing analysis, and hardware execution
Experience developing validation strategies, test plans, regression suites, defect reports, and release-quality assessments for complex software tools
Proficiency with scripting and automation, such as Python, Perl, Tcl, or shell, and experience with CI/CD or automated regression infrastructure
Ability to debug cross-layer software and FPGA issues, analyze results, make risk-based recommendations, and communicate findings to technical and nontechnical stakeholders
Strong collaboration, mentoring, and written and verbal communication skills in a cross-functional environment
Direct experience using or validating at least one HLD tool category: high-level synthesis, DSP-oriented design, AI-oriented FPGA tools, compiler flows, or design-generation tools
Hands-on experience with Altera/Intel Quartus Prime or comparable FPGA development tools from other vendors
Familiarity with Verilog or VHDL; simulation, waveform, synthesis, place-and-route, and timing-analysis tools
Experience with FPGA development kits, board-level testing, SoC integration, PCIe or embedded flows, or hardware/software bring-up
Experience with Linux and Windows test environments, containers, virtual machines, and shared lab infrastructure
Experience with performance characterization, AI model benchmarking, test-result analysis, and automated reporting
Experience with UI automation using Playwright, Selenium, or comparable tools where applicable to the supported product flows