Memory Design Engineer

Intel Corporation

. Partner with domain experts, EDA vendors, and product design teams to develop and deliver memory technology collaterals .

Posted 11/5/2026full-timeUnited StatesJuniorMid-Level💰 $105,650 - $200,340 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in memory technology design, including advanced memory bitcell and circuit design, while optimizing power, performance, and area. Proficient in utilizing EDA tools for digital and analog design verification and developing high-performance memory solutions.

Highest-signal resume keywords

Memory Bitcell DesignEDA Tools ProficiencyAdvanced CMOS Process TechnologiesPower Performance OptimizationCustom Memory Circuit Verification

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Memory Circuit DesignLayout DesignSimulationVerificationMemory Library DevelopmentTest Chip ValidationDevice PhysicsCharacterizationDigital DesignAnalog Design

Tools & Technologies

Cadence VirtuosoSynopsys StarRCSynopsys HSPICE

Industry Keywords

Memory TechnologyPower OptimizationPerformance OptimizationArea OptimizationProduct Design Enablement

About the role

Key responsibilities & impact

Partner with domain experts, EDA vendors, and product design teams to develop and deliver memory technology collaterals
Define, develop, and optimize advanced memory bitcells, array architectures, and peripheral circuits
Lead memory pathfinding and optimize power, performance, and area through design-technology co-optimization and product design enablement
Develop and validate memory libraries for PDK enablement across Intel's advanced process technologies
Design memory arrays and IP, develop innovative memory circuits, and execute and validate test chips
Enable high-performance, high-density, low-power memory for Intel products and customers

Requirements

What you’ll need

BA degree with 3 years of experience, or Master's degree in Electrical Engineering, Computer Engineering, or a related STEM field with 2+ years of experience, or a PhD with no experience
Experience in customer circuit design, simulation, layout design and verification
Hands-on experience with relevant industry EDA tools and flows for digital and/or analog design and verification, such as Cadence Virtuoso, Synopsys StarRC, and Synopsys HSPICE
Experience in memory bitcell and circuit design
Experience with advanced CMOS process technologies and device physics
Experience evaluating and balancing power, performance, and area trade-offs
Experience designing, characterizing, and verifying custom memory circuits, such as SRAM, register files, and ROM
Experience optimizing the physical design of custom circuits

Benefits

Comp & perks

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation