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Intel Corporation

Senior Principal Engineer – Device Design

Intel Corporation

. Lead cross-functional, multi-disciplinary teams in defining base and derivative semiconductor architectures, including advanced transistors, interconnects, and design rules .

Posted 11/6/2026full-timeUnited StatesSenior💰 $265,480 - $374,800 per yearWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates extensive expertise in semiconductor technology development, including CMOS device physics and design rule validation, while providing technical leadership in high-volume manufacturing environments. Capable of translating product requirements into tailored silicon solutions and guiding cross-functional teams to achieve performance targets.

Highest-signal resume keywords
CMOS Device PhysicsDesign Rule DevelopmentStatistical Data AnalysisHigh-Volume Manufacturing (HVM)Technical Leadership

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Device DesignStatistical Process Control (SPC)Design of Experiments (DOE)E-Test Data AnalysisYield MonitoringAdvanced-Node Transistor DesignSilicon Solutions DevelopmentValidation ProcessesCustomization for Low-Power TechnologiesPhysical Verification Flows
Soft Skills
Exceptional Communication SkillsTechnical Mentorship
Tools & Technologies
Design Rule Checker (DRC)Mask Generation Concepts
Certifications & Qualifications
Master's Degree in Electrical EngineeringMaster's Degree in PhysicsMaster's Degree in Material Science
Industry Keywords
Semiconductor IndustryDevice PhysicsYield EngineeringProduct DesignEmerging Semiconductor Trends

Tech Stack

Tools & technologies
Node.js

About the role

Key responsibilities & impact
  • Lead cross-functional, multi-disciplinary teams in defining base and derivative semiconductor architectures, including advanced transistors, interconnects, and design rules
  • Partner with external customers, product design teams, and internal engineering groups to understand product requirements and resolve circuit-level performance, reliability, and leakage trade-offs
  • Translate product needs into tailored silicon solutions
  • Drive development and implementation of customized semiconductor features across logic and memory technologies
  • Set and govern device and interconnect performance targets
  • Evaluate silicon-to-simulation health, model readiness, and design feasibility for large-volume manufacturing
  • Bridge Process Integration, Process Module, Device Physics, Yield Engineering, and Product Design teams
  • Coordinate complex technology handoffs and resolve system-level constraints
  • Direct validation and strategic waiver management for advanced design rules
  • Guide evaluation of E-test and yield data using statistical methods and data analysis techniques
  • Provide senior technical mentorship to engineers and researchers
  • Monitor emerging semiconductor industry trends and foster technical excellence and customer-centric innovation

Requirements

What you’ll need
  • Progressive experience in the semiconductor industry focused on CMOS device physics, device design, and semiconductor technology development
  • Demonstrated technical leadership leading cross-functional teams to define, develop, and deliver advanced semiconductor technologies and design rules into High-Volume Manufacturing (HVM)
  • Deep proficiency in design rule development, validation, and waiver management processes
  • Proven expertise in statistical data analysis, Design of Experiments (DOE), and data interpretation for test chip, E-test, and yield trends
  • Architectural experience in advanced-node transistor design and scaling
  • Experience in specialized semiconductor customization for low-power, analog, mixed-signal, and memory technologies
  • Familiarity with physical verification flows, Design Rule Checker (DRC) development, and mask generation concepts
  • Extensive experience in a High-Volume Manufacturing (HVM) environment, statistical process control (SPC), and yield monitoring
  • Exceptional verbal and written communication skills
  • Master's degree in Electrical Engineering, Physics, Material Science, or a related field
  • 15+ years of relevant semiconductor device and technology development experience
  • Must consent to and pass an extended Background Investigation

Benefits

Comp & perks
  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation benefits
  • Hybrid work model allowing employees to split time between working on-site and off-site