SoC Logic Design Engineer

Intel Corporation

. Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques .

Posted 11/10/2026full-timeUnited StatesJunior💰 $105,650 - $149,150 per yearWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in Register Transfer Level (RTL) coding, particularly with Verilog or VHDL, and possesses foundational knowledge in SoC design, optimization, and integration. Strong analytical skills and effective communication abilities support collaboration in cross-functional teams and adherence to quality assurance standards.

Highest-signal resume keywords

RTL Coding Languages (Verilog, VHDL)SoC Design and IntegrationTiming Analysis and Static Timing ToolsPower, Performance, and Area OptimizationQuality Assurance Standards Compliance

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Register Transfer Level (RTL) CodingVerilogVHDLSoC DesignTiming AnalysisStatic Timing ToolsPower OptimizationPerformance OptimizationArea OptimizationIP Integration

Soft Skills

Analytical SkillsProblem-Solving SkillsAttention to DetailEffective Communication

Tools & Technologies

Synopsys Design CompilerCadence Xcelium

Industry Keywords

Semiconductor TechnologyQuality AssuranceSecure Development PracticesData Center Offerings

About the role

Key responsibilities & impact

Design and implement logic for SoC blocks and subsystems using register transfer level (RTL) coding techniques
Integrate IP blocks and subsystems into full-chip SoC designs, ensuring seamless functionality
Conduct quality checks across logic design, including RTL coding, timing, power, and area convergence
Optimize logic designs to meet power, performance, area, and timing targets
Review verification plans and resolve failing RTL tests to ensure design-feature correctness
Collaborate with IP providers to integrate and validate IPs for SoC-level designs
Follow secure development practices to meet security objectives and address security threats in designs
Drive compliance with quality assurance standards for successful IP and SoC handoff
Collaborate on Intel Data Center Group projects shaping the performance, security, and efficiency of data center offerings

Requirements

What you’ll need

Bachelor's degree in Electrical Engineering, Computer Engineering, or related field, with 0-1 years of hands-on experience in logic design gained through internships, academic projects, coursework, or hands-on training OR a Master's degree in Electrical Engineering, Computer Engineering, or related field with no prior professional experience
Advanced experience in register transfer level (RTL) coding languages such as Verilog or VHDL
Basic knowledge of industry-standard tools for logic design, synthesis, and simulation, such as Synopsys Design Compiler and Cadence Xcelium
Basic knowledge of power, performance, and area optimization in SoC designs
Basic knowledge of timing analysis and static timing tools
Strong analytical and problem-solving skills with attention to detail
Effective communication skills to collaborate with cross-functional teams
Experience working on academic or industry projects involving SoC design and IP integration
Passion for learning and contributing to advancements in semiconductor technology

Benefits

Comp & perks

Competitive pay
Stock bonuses
Health benefits
Retirement benefits
Vacation benefits