Senior Engineer II – Verification Engineer

Microchip Technology Inc.

. Drive verification activities for next-generation FPGA platforms .

Posted 9/23/2026full-timeHyderabad • IndiaSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in FPGA/ASIC functional verification, including the development of C/C++ test frameworks and execution of simulation-based verification flows. Proficient in hardware/software co-verification methodologies and capable of mentoring engineers while driving innovation in verification practices.

Highest-signal resume keywords

FPGA/ASIC Functional VerificationC/C++ Test Framework DevelopmentSystemVerilog/UVM MethodologiesPython ScriptingEmbedded Software Validation

ATS Keywords

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Hard Skills

FPGA VerificationC/C++ DevelopmentSystemVerilogUVMRISC-VARM-based SoCsDebugging RTLVerification Plan DevelopmentCoverage-Driven VerificationSimulation Testcase Development

Soft Skills

Analytical SkillsProblem-Solving SkillsCommunication Skills

Tools & Technologies

Embedded SoftwareBFMsProtocol StacksVerification EnvironmentsSimulation Flows

Industry Keywords

Electrical EngineeringIC Chip DesignVerification MethodologiesPre-Silicon VerificationSoC Subsystems

Tech Stack

Tools & technologies

PerlPythonC++

About the role

Key responsibilities & impact

Drive verification activities for next-generation FPGA platforms
Develop and execute FPGA verification strategies
Develop C/C++-based test frameworks
Build firmware-driven verification environments
Execute simulation-based verification flows
Apply hardware/software co-verification methodologies
Contribute to pre-silicon verification using SystemVerilog/UVM environments
Leverage embedded software, BFMs, and protocol stacks to validate real-world use cases
Independently manage complex verification tasks
Debug RTL and firmware interactions
Analyze failures and drive verification closure
Mentor engineers and define verification best practices
Contribute to innovation and continuous improvement in verification methodologies and automation flows
Collaborate with RTL designers, architects, firmware teams, and validation engineers

Requirements

What you’ll need

Bachelor’s or Master’s degree in Electrical Engineering or a related field
8+ years of experience in FPGA/ASIC functional verification with strong focus on C-based or embedded software-driven pre-silicon verification
Experience with RISC-V, ARM-based SoCs, or embedded CPU verification
Hands-on experience developing C/C++ testcases and verification frameworks for FPGA/SoC verification
Strong understanding of FPGA architectures, SoC subsystems, memory architectures, interrupts, DMA, boot flows, and embedded processors
Strong scripting skills in Python, Shell, Perl, and TCL
Experience with coverage-driven and assertion-based verification methodologies
Experience developing constrained-random and directed simulation testcases using SystemVerilog/UVM
Knowledge of C-based testcase development
Solid understanding of IC chip design, development flows, and verification methodologies
Ability to develop verification plans, build robust UVM testbenches, define functional coverage models, execute regressions, analyze coverage gaps, and drive closure against verification goals
Strong analytical, debugging, and problem-solving skills
Excellent written and verbal communication skills in English

Benefits

Comp & perks

Leadership Passage Programs supporting career growth
Employee development opportunities
Values-based decision making and strong sense of community
Company perks
Diversity and workplace excellence initiatives