Senior Semiconductor Test Engineer

Mythic

. Own Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp .

Posted 10/21/2026full-timeAustin • Texas • United StatesSenior💰 $140,000 - $270,000 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in semiconductor test engineering with a focus on Wafer Sort and Final Package Test, including the development and debugging of test programs on ATE platforms. Proven ability to analyze yield data, drive root-cause resolution, and collaborate effectively with cross-functional teams.

Highest-signal resume keywords

Wafer Sort Test EngineeringFinal Package Test EngineeringATE Platform DevelopmentYield Analysis and DebuggingTest Program Automation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Test Program DevelopmentDebugging SkillsManufacturing Test FlowsDevice ScreeningGuardbandingSilicon Bring-UpYield RampTest Data AnalysisPattern ConversionTest Coverage Strategy

Soft Skills

CollaborationProblem-SolvingRoot-Cause Analysis

Tools & Technologies

Advantest ATETeradyne ATEPythonJMPProbe CardsLoad Boards

Industry Keywords

Semiconductor Test EngineeringProduction Test DevelopmentMixed-Signal TestingAnalog Silicon TestingDFT Structures

Tech Stack

Tools & technologies

Python

About the role

Key responsibilities & impact

Own Mythic’s end-to-end production test strategy across Wafer Sort, Final Package Test, characterization, screening, and volume ramp
Develop, debug, and release test programs for new silicon products
Define test methodology, coverage strategy, screening philosophy, and release criteria
Lead silicon bring-up, characterization, correlation, guardbanding, and test transfer into manufacturing
Analyze yield and quality data, identify systematic failures and escapes, and drive root-cause resolution
Work with OSATs, foundries, and ATE vendors to deploy and sustain test flows
Balance test coverage, cost, test time, quality, and ramp schedule
Build infrastructure, automation, and analytics for production test and yield learning
Collaborate with design, DFT, product engineering, reliability, and manufacturing teams
Deliver robust, scalable Wafer Sort and Final Test flows, move products from bring-up to manufacturing, and stabilize test programs for volume

Requirements

What you’ll need

5+ years in semiconductor test engineering, product engineering, or production test development
Hands-on ownership of Wafer Sort and Final Package Test
Experience developing, debugging, and releasing test programs on ATE platforms in production
Ability to convert and translate test patterns from STIL, WGL, and VCD into ATE-specific pattern formats
Solid grounding in manufacturing test flows, device screening, test coverage, guardbanding, and outgoing quality
Experience taking silicon through bring-up, characterization, yield ramp, and production release
Strong debug skills and fluency with manufacturing test data
Experience working with design, DFT, product, reliability, and operations teams
Preferred: testing mixed-signal or analog silicon, including trim and calibration
Preferred: experience with AI, accelerator, or high-performance compute silicon
Preferred: experience with Advantest, Teradyne, or similar ATE platforms
Preferred: experience with probe cards, load boards, hardware interfaces, and test hardware debug
Preferred: knowledge of DFT structures such as scan, MBIST, and boundary scan
Preferred: experience managing OSATs and other external manufacturing partners
Preferred: scripting, automation, and test-data analysis using tools such as Python or JMP
Preferred: track record of reducing test time and improving yield and correlation during ramp

Benefits

Comp & perks

Equal employment opportunity and affirmative action employer
Collaborative and respectful work environment
Tools and support to deliver meaningful work