Senior ASIC Verification Engineer

NVIDIA

. Verify the design and implementation of industry-leading GPUs .

Posted 10/2/2026full-timeUnited StatesSenior💰 $136,000 - $264,500 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in ASIC design verification, including proficiency in SystemVerilog and C++. Capable of developing verification infrastructure and collaborating effectively with cross-functional teams to ensure design correctness.

Highest-signal resume keywords

ASIC Design VerificationSystemVerilog ExpertiseC++ ProgrammingVerification MethodologiesDesign and Verification Tools

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

ASIC DesignVerification MethodologiesSystemVerilogC++ ProgrammingRandom StimulusFunctional CoverageAssertion-Based VerificationTest Bench DevelopmentDebugging SkillsComputer Architecture

Soft Skills

Analytical SkillsCollaboration

Tools & Technologies

VCSDebussyGDB

Industry Keywords

GPU DesignMicro-ArchitecturePre-Silicon VerificationPost-Silicon VerificationDigital Design

Tech Stack

Tools & technologies

C++

About the role

Key responsibilities & impact

Verify the design and implementation of industry-leading GPUs
Verify ASIC design, architecture, golden models, and micro-architecture using advanced methodologies such as UVM or equivalent
Understand assigned unit design and implementation, define verification scope, develop verification infrastructure, and verify design correctness
Collaborate with architects, designers, and pre-/post-silicon verification teams

Requirements

What you’ll need

Bachelor’s Degree in EE, CS, or CE; or equivalent experience
5+ years of relevant experience
Background in verification using random stimulus, functional coverage, and assertion-based verification methodologies
Experience with design and verification tools, including VCS or equivalent simulation tools and debug tools such as Debussy and GDB
Experience crafting test bench environments for unit- and system-level verification
Expertise in SystemVerilog or similar HVL
C++ programming language experience, including object-oriented programming principles, data structures, and algorithms
Good working knowledge of computer architecture and digital design
Excellent debugging and analytical skills
Prior processor pipeline verification experience is desirable

Benefits

Comp & perks

Equity
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