Senior Mask Layout Design Engineer

NVIDIA

. Perform physical layout for mixed-signal functions such as PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures in submicron CMOS technologies using Cadence tools .

Posted 11/6/2026full-timeHsinchu • TaiwanSeniorWebsite

Core Competencies

Role fit

Core Competencies

Use this summary to align your resume positioning with the role.

Expertise in physical layout design for mixed-signal functions in submicron CMOS technologies, utilizing Cadence tools for custom circuit design and verification. Strong collaboration skills with ASIC and mixed-signal engineers to ensure successful integration in VLSI products.

Highest-signal resume keywords

BSEE or Equivalent Experience5+ Years Experience in Mask and Layout DesignCadence Virtuoso ProficiencyAnalog Circuit Layout ConceptsScripting Languages Proficiency

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Mask DesignLayout DesignAnalog Circuit LayoutDRC CheckingLVS CheckingVerification ToolsDebuggingCustom LayoutFloor PlanningSubmicron CMOS Technologies

Soft Skills

Interpersonal SkillsTeam CollaborationPositive EnergyPassion

Tools & Technologies

Cadence ToolsVirtuosoDraculaHerculesCalibrePrimeyield

Industry Keywords

Mixed-Signal FunctionsVLSI ProductsCustom Circuit DesignESD StructuresHigh-Speed SerDesAnalog-to-Digital Converters

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Perform physical layout for mixed-signal functions such as PLLs, high-speed SerDes, analog-to-digital converters, and ESD structures in submicron CMOS technologies using Cadence tools
Work cross-functionally with ASIC and mixed-signal engineers to customize designs for integration in VLSI products
Participate in floor planning, custom layout, and verification against design rules and schematics

Requirements

What you’ll need

Have a BSEE or equivalent experience
Minimum of 5+ years validated experience in Mask and Layout Design
Deep understanding of analog circuit layout concepts in submicron CMOS technologies
Authority with Cadence custom circuit design tools, particularly Virtuoso
Experience running and debugging verification tools such as Dracula, Hercules, Calibre, and Primeyield
Ability to work successfully in a team
Good interpersonal skills, passion and positive energy
Proficient in scripting languages like Perl, Python, SKILL, etc.
Knowledge of DRC and LVS checking flows
Ability to customize decks

Benefits

Comp & perks

Equal opportunity employer
Diversity-valuing workplace
Non-discrimination on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability