Senior Verification Engineer – HSIO Unit Level

NVIDIA

. Develop UVM-based verification test benches and methodologies .

Posted 10/27/2026full-timeBengaluru • IndiaSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in UVM-based verification methodologies and high-speed IO verification, with a strong focus on architecting testbenches and ensuring verification closure for complex systems. Proficient in collaborating with cross-functional teams to deliver robust verification environments.

Highest-signal resume keywords

UVM-Based VerificationHigh Speed IO VerificationSystemVerilog (SV)Verification ClosureTestbench Architecture

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Verification MethodologiesFunctional CoverageBus Functional ModelsDebugging SkillsAnalytical Skills

Soft Skills

Interpersonal SkillsCommunication SkillsTeam Collaboration

Tools & Technologies

Verification ToolsSimulation Tools

Industry Keywords

USBUFSMPHYEthernetMACSECSOC Verification

About the role

Key responsibilities & impact

Develop UVM-based verification test benches and methodologies
Verify complex rapid data transfer IO IPs and sub-systems such as USB, UFS, MPHY, Ethernet, and MACSEC
Architect testbenches and craft verification environments using SV and UVM methodology
Define test plans, tests, and verification infrastructure for modules, clusters, and systems
Build efficient and reusable bus functional models, monitors, checkers, and scoreboards
Implement functional coverage and coordinate the verification closure process for the unit
Work with architects, designers, FPGA, and post-silicon teams to ensure the unit is robust

Requirements

What you’ll need

BTech or MTech in ECE, EE, CSE, or an equivalent degree is required
4+ years of demonstrated ability in verification closure of complex units, sub-systems, or SOC level verification
Proven experience in High Speed IO verification (UFS/PCIE/XUSB)
Knowledge of 10G/1G Ethernet MAC and Switch
Experience in the latest verification methodologies like SV and UVM
Good debugging and analytical skills
Exposure to industry-standard verification tools for simulation and debug
Good interpersonal skills
Ability to work as a diligent teammate
Excellent communication skills to collaborate with cross-cultural global teams and work in a matrix organization

Benefits

Comp & perks

Highly competitive salaries
Comprehensive benefits package
Reasonable accommodation for individuals with disabilities to participate in the job application or interview process, perform essential job functions, and receive other benefits and privileges of employment