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NXP Semiconductors

Head – SoC Physical Design Manager

NXP Semiconductors

. Lead, develop and grow a team of Physical Design, STA and signoff engineers .

Posted 11/4/2026full-timeSophia-Antipolis • FranceLeadWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates extensive expertise in Physical Design strategy and execution for complex IC and mixed-signal SoC developments, with a strong focus on Static Timing Analysis, power integrity, and physical verification. Proven ability to lead and mentor engineering teams while fostering a culture of collaboration and continuous improvement.

Highest-signal resume keywords
Physical Design StrategyStatic Timing AnalysisPower IntegrityTeam LeadershipEDA Methodologies

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
Place & RouteTiming ClosurePhysical SignoffIR-Drop AnalysisElectromigrationSignal IntegrityPower ManagementPhysical VerificationDRCLVS
Soft Skills
MentoringCollaborationCommunicationInfluencing DecisionsTechnical Leadership
Tools & Technologies
EDA ToolsAutomation ScriptsDesign FlowsPower PlanningClock-Tree Implementation
Industry Keywords
IC DesignSoC DevelopmentMixed-Signal IntegrationAnalog/Digital InterfacesTape-Out Readiness

About the role

Key responsibilities & impact
  • Lead, develop and grow a team of Physical Design, STA and signoff engineers
  • Establish technical direction, priorities and accountability across the team
  • Build an engineering culture based on technical excellence, collaboration, ownership and continuous improvement
  • Coach and mentor engineers and technical leaders
  • Identify competency and capability needs and develop the organization
  • Support resource and capability planning across multiple development programs
  • Own Physical Design strategy and execution for complex IC and mixed-signal SoC developments
  • Lead floorplanning, partitioning, power planning, placement, clock-tree implementation, routing and physical optimization
  • Drive Static Timing Analysis and timing closure in complex multi-mode, multi-corner environments
  • Lead implementation and verification of power-management architectures
  • Drive power integrity and reliability activities, including IR-drop and electromigration
  • Provide technical leadership for mixed-signal physical integration at analog/digital interfaces and noise-sensitive circuitry
  • Ensure physical verification and signoff, including DRC, LVS and tape-out readiness
  • Lead technical reviews and resolve timing, congestion, power, signal-integrity, reliability and physical-verification challenges
  • Collaborate with architecture and front-end teams to influence early design decisions
  • Share knowledge and develop company-wide Physical Design best practices across NXP
  • Standardize and improve P&R, STA, power, physical-verification and signoff flows
  • Promote reuse of methodologies, automation, scripts, flows and engineering solutions
  • Partner with EDA, methodology, technology, library and IP teams
  • Drive adoption of improved methodologies and technologies
  • Represent the organization in cross-NXP technical discussions and shape the Physical Design strategy and roadmap

Requirements

What you’ll need
  • Significant experience in advanced IC/SoC Physical Design, supported by multiple successful tape-outs and ramp of high volume products
  • Deep technical knowledge of Place & Route, STA, timing closure, packaging, physical signoff, IR-drop, EM, signal integrity, power integrity and reliability for low power designs with complex power management
  • Strong understanding of the interaction between architecture, RTL, synthesis, DFT, Physical Design, analog design, packaging and silicon validation
  • Experience improving and industrializing EDA methodologies, automation and design flows
  • Proven experience leading and developing engineering teams
  • Demonstrated ability to mentor technical experts and develop future technical and organizational leaders
  • Experience collaborating across multiple organizations, sites or business groups
  • Ability to influence technical decisions beyond the direct reporting organization and build alignment between engineering teams
  • Strong communication skills and ability to translate complex engineering issues into clear technical and program decisions