Design Verification Manager

Semtech

. Lead, mentor, and develop a geographically distributed verification team across multiple projects .

Posted 10/14/2026full-timeSan Diego • California • United StatesSeniorLead💰 $116,000 - $216,000 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive expertise in digital integrated circuit design verification, including proficiency in SystemVerilog, UVM, and leading verification teams. Capable of developing and implementing verification strategies, managing complex test environments, and driving adoption of advanced methodologies.

Highest-signal resume keywords

Digital Integrated Circuit VerificationSystemVerilog ProficiencyUVM ExpertiseTechnical LeadershipMixed-Signal Verification

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

SystemVerilogUVMVerilogVHDLPythonPerlDebuggingTest Plan DevelopmentCoverage AnalysisAnalog Block Behavioral Modeling

Soft Skills

Analytical SkillsProblem-Solving SkillsCommunication SkillsMentoringSelf-Motivation

Tools & Technologies

EDA Verification ToolsSynopsysSiemensCadenceContinuous Integration ToolsRegression Testing Tools

Industry Keywords

Integrated Circuit Design VerificationMCU-Based Hardware SystemsHardware ProtocolsMixed-Signal ProductsConsumer Circuit Developments

Tech Stack

Tools & technologies

PerlPython

About the role

Key responsibilities & impact

Lead, mentor, and develop a geographically distributed verification team across multiple projects
Manage verification deliverables, quality, schedules, and resource allocation for concurrent projects
Define and implement verification strategies and test plans for digital/mixed-signal integrated circuit designs at block and top levels
Collaborate with design teams to understand micro-architecture and specifications
Direct test plans, coverage models, verification environments, and coverage closure
Generate technical documentation and lead verification reviews
Manage complex SystemVerilog and UVM testbenches
Lead RTL, gate-level, and analog/mixed-signal verification at block and chip levels
Develop directed test cases, constrained-random verification environments, and reusable verification components
Improve verification scalability and portability through environment enhancements and tool automation
Establish and manage continuous integration, regression testing, scoreboards, monitors, and checkers
Report verification progress to engineering leadership and program management using quantitative metrics and coverage analysis
Identify and mitigate verification risks early
Interface with system, digital hardware, embedded firmware, analog, and cross-functional teams
Drive adoption of advanced verification methodologies, best practices, and tool evaluation
Provide technical support to silicon lab evaluation, test, product, and application engineers

Requirements

What you’ll need

10+ years of industry experience in integrated circuit design verification (DV)
B.S. or M.S. in Electrical or Computer Engineering
Experience leading, mentoring or informally managing engineers or projects
Strong analytical, synthesis and problem-solving skills
In-depth knowledge and experience in digital integrated circuit verification with MCU-based hardware systems (ARM, RISC-V, PIC, STM32), memories, custom digital micro-architecture, interfaces, dedicated hardware peripherals, external IPs, and analog peripherals
Proficiency in SystemVerilog, UVM, Verilog/VHDL, Python, Perl, debugging, and industry-leading EDA verification tools including Synopsys, Siemens, and Cadence
Demonstration of technical leadership
Ability to work independently, remain self-motivated, rigorous, innovative, and follow through
Excellent verbal and written communication skills
Experience with standard hardware protocols including I2C, I3C, SPI, and MIPI
Experience in mixed-signal products and AMS verification
Experience with analog block behavioral modeling using SV RNM/Verilog/VHDL
Experience with consumer and/or ITA market circuit developments

Benefits

Comp & perks

Friday remote work
EEO employer M/F/D/V
Drug-free workplace