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RFIC Designer
Sony Semicon (IL). Design and simulate RF/analog building blocks such as LNA, PA, mixer, and analog filters .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates advanced knowledge in CMOS RF and analog design, with hands-on experience in designing and simulating RF building blocks such as LNA, PA, and mixers. Proficient in using Cadence Virtuoso and SpectreRF for transistor-level design and validation, alongside practical lab experience in RF measurements and silicon debugging.
Highest-signal resume keywords
CMOS RF And Analog DesignCadence VirtuosoSpectreRFRF Measurement EquipmentTransistor-Level Design
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
LNAPAMixerRF AmplifiersVCORFIC Design MethodologiesEM Simulation ToolsLayout VerificationParasitic ExtractionSilicon Validation
Soft Skills
Analytical SkillsProblem-SolvingCommunicationCollaborationProject Ownership
Tools & Technologies
Cadence VirtuosoSpectreRFEM Simulation ToolsRF Measurement Equipment
Certifications & Qualifications
BSc In Electrical Engineering
Industry Keywords
RF Signal ChainPerformance BottlenecksSystem-Level SpecificationsPhysical Verification
About the role
Key responsibilities & impact- Design and simulate RF/analog building blocks such as LNA, PA, mixer, and analog filters
- Support lab measurements and silicon debugging to validate and optimize designs
- Contribute to system-level analysis and architecture discussions
- Define block and system-level specifications and allocate budgets across the RF signal chain
- Support layout floorplanning and physical verification
- Own designs from interpreting system requirements and selecting topologies through transistor-level design, layout guidance, validation, and production ramp-up
- Collaborate with system, layout, backend, and validation teams
- Review simulation results, align performance budgets, assess layout parasitics, and debug silicon in the lab
Requirements
What you’ll need- BSc (or higher) in Electrical Engineering
- Advanced knowledge and hands-on experience in CMOS RF and analog design, including at least one of: LNA, PA, Mixer, RF amplifiers, VCO
- In-depth understanding of RFIC/analog design methodologies and flows
- Proven ability to design and simulate at the transistor level and take blocks from concept to silicon
- Proficiency in Cadence Virtuoso and SpectreRF
- Experience with EM simulation tools
- Familiarity with layout, parasitic extraction, and physical verification
- Practical lab experience with RF measurement equipment, silicon validation, and debugging
- Understanding of RF signal chains, performance bottlenecks, and trade-offs
- Experience interpreting system-level specifications and allocating performance margins across the RF signal chain
- Proficiency in complementary EDA tools
- Strong analytical, problem-solving, communication, collaboration, and project ownership skills
- Ability to work independently in fast-paced environments and adapt to new challenges
Benefits
Comp & perks- Flat organization where ideas flow freely between engineers and leadership
- Experienced team members actively mentor newer colleagues