Formal Verification Engineer

Tenstorrent Inc.

. Ensure the correctness of next-generation high-performance RISC-V CPUs and AI compute platforms .

Posted 10/31/2026full-timeRemote • California • United StatesMid-LevelSenior💰 $100,000 - $500,000 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates extensive experience in formal verification methodologies and tools, with strong skills in SystemVerilog and a solid understanding of digital design and computer architecture. Capable of analyzing complex hardware behaviors and developing scalable properties and proofs for modern processor designs.

Highest-signal resume keywords

Formal Verification MethodologiesSystemVerilog SkillsDigital Design UnderstandingProgramming Skills in PythonExperience with CPU Microarchitecture

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Formal VerificationDesign VerificationProperty CheckingAssertionsSVA DebuggingDigital DesignComputer ArchitecturePython ProgrammingTcl ScriptingC/C++ Programming

Soft Skills

Debugging AbilitiesProblem-Solving Skills

Industry Keywords

RISC-V CPUsAI Compute PlatformsSoCsASICsMicroarchitectureControl LogicCPU PipelinesCachesDesign Verification TechniquesExport-Controlled Technology

Tech Stack

Tools & technologies

PythonC++

About the role

Key responsibilities & impact

Ensure the correctness of next-generation high-performance RISC-V CPUs and AI compute platforms
Use formal methods to prove complex hardware behavior and uncover corner cases that simulation may miss
Work closely with CPU architects, RTL designers, and design verification engineers
Develop properties and build formal verification environments
Analyze failures and drive issues to closure
Apply formal techniques to challenging problems in modern processor design
Identify hardware behaviors best verified through formal methods versus simulation, emulation, and other design verification techniques
Develop scalable properties and proofs for complex control logic and interacting microarchitectural blocks

Requirements

What you’ll need

6+ years of experience in design verification, formal verification, or related RTL verification for CPUs, SoCs, ASICs, or complex digital designs
Hands-on experience with formal verification methodologies and tools, including property checking, assertions, assumptions, constraints, and coverage analysis
Strong SystemVerilog skills, including experience writing and debugging SVA
Solid understanding of digital design and computer architecture
Experience with CPU pipelines, caches, interfaces, control logic, or other complex microarchitecture is highly valuable
Strong programming and scripting skills in Python, Tcl, C/C++, or similar
Excellent debugging and problem-solving abilities
Eligibility to access U.S. export-controlled technology, including compliance with applicable export laws and potential citizenship/permanent residency or license requirements

Benefits

Comp & perks

Highly competitive compensation package and benefits
Equal opportunity employer