FREE ACCESS
5,000–10,000 jobs/day
See all jobs on Scoutfield
Search thousands of fresh jobs every day.
Discover
- Fresh listings
- Fast filters
- No subscription required
Create a free account and start exploring right away.
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in C++, Rust, and Python for developing tools in formal verification and synthesis workflows, with a strong understanding of hardware model checking and RTL design. Capable of contributing to open-source projects and implementing algorithms from scientific literature independently.
Highest-signal resume keywords
C++ ProgrammingRust ProgrammingPython ProgrammingHardware Model CheckingRTL Hardware Design
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
C++ ProgrammingRust ProgrammingPython ProgrammingFormal VerificationRTL SynthesisAlgorithm ImplementationCompiler DevelopmentSAT/SMT SolvingTheorem ProvingAutomata Theory
Soft Skills
Independent WorkResponsibility
Tools & Technologies
YosysOpen-Source EDA Tools
Industry Keywords
Formal MethodsEngineering ApplicationsScience ApplicationsASIC DesignVerification
Tech Stack
Tools & technologiesPythonRustC++
About the role
Key responsibilities & impact- Contribute to YosysHQ’s synthesis or formal verification areas
- Develop and maintain tools using C++, Rust, and Python
- Work on implementation of hardware model checking and formal methods, or RTL/ASIC synthesis workflows
- Build software for engineering or science applications, implement algorithms from scientific literature, or work on compiler-related projects
- Become familiar with and contribute to a large pre-existing open-source project
- Take responsibility for assigned tasks and address challenges independently
- Contribute to Yosys and the open-source EDA ecosystem
- Potentially interact with or contribute to YosysHQ’s open-source tools
Requirements
What you’ll need- Comfortable with C++ or Rust for formal verification; willingness to learn the other languages, including Python
- Familiarity with implementation of hardware model checking is ideal
- Alternatively, background in verification or formal methods such as SAT/SMT solving, automated/interactive theorem proving, programming language theory, or automata theory
- Some contact with RTL hardware design for formal verification
- Comfortable with C++ for synthesis
- Some experience with RTL hardware design, ideally for ASIC
- Experience building software for engineering or science applications, implementing algorithms from scientific literature, or working on a compiler may transfer to the role
- Experience becoming familiar with a large pre-existing project
- Ability to take responsibility for assigned tasks and work independently without extensive supervision
- Must not live in a country subject to sanctions or export restrictions, or be banned from performing work for the US government
- CV and brief cover letter required for application
Benefits
Comp & perks- Flexible remote work
- Flexible working hours
- Part-time option (1–5 days per week)
- Flat pay hierarchy with the same rate for everyone
- Ability to work from wherever you are
- Team meetings usually between 3pm and 6pm Vienna time (CET/CEST), otherwise choose working hours