Design Engineer I – Synthesis, LEC, CLP

Cadence Design Systems

. Assist in running and monitoring Logical Equivalence Checking (LEC), Logic Synthesis, and Conformal Low Power jobs across design blocks .

Posted 9/15/2026full-timeBangalore • IndiaJuniorMid-LevelWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates foundational knowledge in ASIC design flow and scripting skills in Python, Perl, and Tcl. Capable of supporting Logical Equivalence Checking and Logic Synthesis tasks while maintaining documentation and collaborating effectively within a team.

Highest-signal resume keywords

ASIC Design FlowScripting Skills in PythonLogical Equivalence CheckingCadence Tools ExposureAnalytical Problem-Solving

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Logical Equivalence CheckingLogic SynthesisBasic Scripting in PythonBasic Scripting in PerlBasic Scripting in TclBasic Understanding of Digital Logic DesignBasic Understanding of Computer ArchitectureConstraint ReviewsECO Script WritingPower Intent Basics

Soft Skills

Strong Analytical SkillsProblem-Solving SkillsGood Communication SkillsTeam CollaborationEagerness to Learn

Tools & Technologies

Cadence GenusCadence ConformalEDA Tool Flows

Industry Keywords

ASICElectrical EngineeringElectronic Engineering

Tech Stack

Tools & technologies

PerlPythonUnix

About the role

Key responsibilities & impact

Assist in running and monitoring Logical Equivalence Checking (LEC), Logic Synthesis, and Conformal Low Power jobs across design blocks
Support constraint reviews, generation, and basic debugging
Track and document LEC and synthesis status across blocks
Learn and apply power intent basics to support CLP sign-off tasks
Support ECO script writing and basic scripting tasks using Tcl, Perl, or Python
Maintain documentation of runs, issues, and findings
Support execution-level tasks across the ASIC design flow

Requirements

What you’ll need

0–2 years of experience; internship or academic project experience with ASIC flows is a plus
BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent
Bachelor's/master’s degree in Electronics or Electrical Engineering
Basic understanding of the complete ASIC design flow
Basic scripting skills in Python, Perl, Tcl, or Unix shell
Strong analytical and problem-solving skills
Eagerness to learn EDA tool flows
Good communication skills and ability to work well in a team
Exposure to Cadence tools (Genus, Conformal) through coursework or internship is preferred
Basic understanding of digital logic design and computer architecture is preferred

Benefits

Comp & perks

Opportunity to work on cutting-edge technology
Employee-friendly policies focused on physical and mental well-being
Career development opportunities
Learning and development opportunities
Recognition and celebration of employee success
Collaborative “One Cadence – One Team” culture
Opportunity to work with a diverse team