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Cadence Design Systems

Design Engineering Architect – Systems and Interfaces

Cadence Design Systems

. Serve as the technical authority for Cadence interface controllers and system-level IP integration in customer engagements .

Posted 11/4/2026full-timeSan Jose • California • United StatesSeniorLead💰 $185,500 - $344,500 per yearWebsite

Core Competencies

Role fit
Core Competencies

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Expertise in RTL Design, Verification, and Debug of High-Speed Interface Protocols, with a strong focus on IP Integration and System-Level Deployment. Proven ability to lead cross-functional teams in resolving complex customer issues and enhancing product offerings based on customer needs.

Highest-signal resume keywords
RTL DesignHigh-Speed Interface ProtocolsIP IntegrationVerilogSystem Architecture

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
RTL VerificationDebuggingSoC Implementation FlowsStatic Timing AnalysisDFTCDCPCIeUCIeEthernetAMBA Protocols
Soft Skills
Written CommunicationVerbal Communication
Certifications & Qualifications
BS in EE/CSMS in EE/CS
Industry Keywords
System-Level IP IntegrationCustomer EngagementsProduct EvaluationsTechnical GuidanceReference Designs

About the role

Key responsibilities & impact
  • Serve as the technical authority for Cadence interface controllers and system-level IP integration in customer engagements
  • Lead resolution of critical customer issues and escalations, coordinating with development engineering, sales, marketing, and customer support teams on pre-sales and post-sales engagements
  • Develop reference designs, technical collateral, and application notes for IP integration, SoC design, and verification
  • Develop and deliver training for customers and field application engineers
  • Provide advanced technical guidance to customers, support teams, and field application engineers on IP integration, configuration, and system-level deployment
  • Lead product evaluations and release-readiness reviews, identifying integration risks, usability gaps, and advanced customer use cases
  • Analyze and propose enhancements to products and documentation based on customer needs and use cases
  • Contribute to product definition and drive complex pre-sales and post-sales engagements

Requirements

What you’ll need
  • Demonstrated expertise in RTL design, verification, and debug of high-speed interface protocols such as PCIe, UCIe, and Ethernet
  • Experience integrating IP into complex SoCs, with a strong understanding of system architecture, interfaces, and on-chip interconnects
  • Experience with AMBA protocols, including ACE, CHI, AXI, and APB
  • Proficient in writing and debugging RTL (Verilog, SystemVerilog)
  • Experience with end-to-end SoC implementation flows, including RTL synthesis, design constraints, DFT, CDC, and static timing analysis
  • Demonstrated ability to analyze complex hardware and system problems, identify root causes, and drive cross-functional teams to resolution
  • Strong written and verbal communication skills
  • A BS in EE/CS with 12+ years, or an MS in EE/CS with 8+ years of relevant work experience
  • Ability to travel up to 10% of the time, including internationally

Benefits

Comp & perks
  • Incentive compensation: bonus
  • Equity
  • Paid vacation
  • Paid holidays
  • 401(k) plan with employer match
  • Employee stock purchase plan
  • Medical, dental, and vision plan options