Wireless Platform Architect

Ceva, Inc.

. Define the RSS end-to-end architecture and HW/SW partitioning, including interfaces between the radio, PHY, MAC, CPU/MCU, memories, PMU, clock and reset management (CRM) and other subsystem components.

Posted 10/4/2026full-timeRa'anana • IsraelMid-LevelSeniorWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in defining end-to-end architecture for hardware-based wireless communication systems, with a strong focus on low-power design, system integration, and customer engagement throughout the SoC productization process.

Highest-signal resume keywords

System And Architecture DefinitionWireless Communication StandardsLow-Power DesignVLSI/ASIC DevelopmentTechnical Leadership

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

End-To-End ArchitectureSoC ArchitectureRF IntegrationSignal ProcessingMAC Layer ArchitectureEmbedded ProcessorsLow-Level Firmware ArchitectureSilicon ValidationPPA OptimizationDebugging

Soft Skills

Communication SkillsTeam PlayerCustomer-Facing SkillsFlexibilityInnovation Mindset

Certifications & Qualifications

B.Sc. in Electrical EngineeringM.Sc. in Electrical Engineering

Industry Keywords

Wireless Communication SystemsInteroperabilityASIC ProductizationSystem Bring-UpControl FlowsState MachinesPower DomainsTestabilityDebugSilicon Area

About the role

Key responsibilities & impact

Define the RSS end-to-end architecture and HW/SW partitioning, including interfaces between the radio, PHY, MAC, CPU/MCU, memories, PMU, clock and reset management (CRM) and other subsystem components.
Define architecture and operational mechanisms for multi-protocol operation and interoperability, including HW interfaces, state machines, control flows and operation sequences.
Define sleep/wake-up modes, testability, security and debug.
Drive PPA optimization and competitive benchmarking of the RSS, with particular focus on low-power operation, silicon area and overall system efficiency.
Work closely with RF, PHY/algorithm, HW, SW/firmware, verification and integration teams, from early system studies and architecture definition through RTL/FPGA validation and system bring-up.
Work directly with customers during technical engagements to define the RSS integration into their SoC and support customers throughout SoC integration, validation and productization, addressing system-level architecture, interoperability and integration challenges.

Requirements

What you’ll need

B.Sc. or M.Sc in Electrical Engineering
Proven experience in system and architecture definition for hardware based wireless communication systems
Experience in wireless communication standards (such as WiFi/BT/Cellular/UWB etc.)
Strong understanding of low-power design and system architecture
Good understanding of SoC architecture and IPs integration, including system interfaces, memory, interrupts, clocks, resets and power domains
Deep understanding of VLSI/ASIC development processes and methodologies
Good understanding of ASIC productization and system bring-up flows
Strong technical leadership skills with the ability to drive architectural decisions
Team player with good communication skills
Strong customer-facing technical skills, with the ability to translate customer requirements and SoC constraints into system architecture
Flexibility and innovation mindset
Knowledge in RF integration, control and calibrations
Knowledge in Signal Processing and PHY architecture
Knowledge in MAC layer Architecture
Experience with embedded processors/MCUs and low-level firmware architecture
Experience in lab work, Silicon validation and bring-up