ASIC Digital Design Lead

Cisco

. Architect digital systems for next-generation optical interconnects .

Posted 10/1/2026full-timeUnited StatesSenior💰 $177,600 - $257,400 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in architecting digital systems for optical interconnects, managing the full ASIC lifecycle, and leading cross-functional engineering teams. Proficient in developing specifications, optimizing performance for high-speed silicon photonics, and integrating complex digital blocks.

Highest-signal resume keywords

ASIC Lifecycle ManagementDigital Architecture DefinitionHigh-Speed SerDes IntegrationCross-Functional Team LeadershipVerification Coverage Review

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

Digital DesignComplex SoCsFPGA ValidationBus and Interface ProtocolsPower/Timing BudgetingSynthesisTiming ClosureLow-Power DesignDesign Automation ScriptingQOR Metric Processing

Soft Skills

Technical LeadershipCollaboration

Industry Keywords

Silicon PhotonicsOptical InterconnectsD2D PHY IPEthernetATE Bring-UpMicroarchitecturesVerification MetricsFirmware-Based Verification

About the role

Key responsibilities & impact

Architect digital systems for next-generation optical interconnects
Own the full ASIC lifecycle from initial concept through tapeout, post-silicon production, and ATE bring-up
Lead cross-functional engineering teams across digital, analog, firmware, and physical design
Define digital architectures for Silicon One Optics
Integrate high-speed IP including ODSP, D2D IP, and SerDes XSR/PAM4
Optimize power and performance for 100G, 200G, and 400G silicon photonics and Co-Packaged Optics
Drive technical strategy and interconnect innovation
Develop top- and block-level specifications and microarchitectures
Review verification coverage and debug verification issues
Support firmware-based verification and architecture
Perform backend implementation, automation, and QOR metric processing

Requirements

What you’ll need

Bachelor’s degree plus 12 years of related experience, or Master’s degree plus 8 years of related experience, or PhD plus 5 years of related experience
Prior digital design experience with FSMs, CPU sub-systems, complex SoCs, and FPGA validation
Prior experience managing the complete ASIC/SoC design flow
Experience with one or more bus and interface protocols, such as SPI, I2C, APB, and AXI
Experience with high-speed SerDes, Ethernet, and/or D2D PHY IP
Experience leading architecture and design of complex digital blocks and CPU subsystems from pre-silicon RTL to GDS2 signoff through post-silicon FPGA prototyping, lab validation, and ATE bring-up
Experience developing top- and block-level specifications for high-speed datapaths and low-speed control planes
Experience with power/timing budgeting, feedback/control system stability, and hardware-versus-firmware trade-offs
Experience reviewing verification coverage metrics and debugging verification issues
Experience supporting firmware-based verification/architecture and integrating SerDes and DSP IP
Hands-on experience with synthesis, timing closure, DFT, low-power design, design automation scripting, and QOR metric processing
6+ years in a technical leadership role collaborating across cross-functional engineering teams

Benefits

Comp & perks

Medical, dental and vision insurance
401(k) plan with a Cisco matching contribution
Paid parental leave
Short- and long-term disability coverage
Basic life insurance
Cisco restricted stock unit grants may be available
10 paid holidays per full calendar year
1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday
Paid year-end holiday shutdown
4 paid days off for personal wellness
16 days of paid vacation per full calendar year for non-exempt employees
Flexible vacation time off program for exempt employees with no defined limit, subject to availability and business limitations
80 hours of sick time off provided on hire date and each January 1st thereafter
Up to 80 hours of unused sick time carried forward
Additional paid time away for critical or emergency family issues
Optional 10 paid volunteer days per full calendar year
Annual bonuses for non-sales roles, subject to Cisco’s policies
Performance-based incentive pay for sales-plan employees