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Cisco

Signal and Power Integrity Technical Leader

Cisco

. Develop, document, and implement design rules for ultra-high-speed signaling .

Posted 10/2/2026full-timeUnited StatesSenior💰 $214,100 - $309,800 per yearWebsite

Core Competencies

Role fit
Core Competencies

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Demonstrates expertise in signal and power integrity for high-speed ASIC design, with a strong background in leading technical teams and collaborating across multidisciplinary engineering environments. Proficient in advanced packaging techniques and tools essential for high-quality ASIC development.

Highest-signal resume keywords
Signal Integrity ExpertisePower Integrity AnalysisHigh-Speed ASIC DesignLeadership in Technical TeamsAdvanced Packaging Techniques

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills
Signal IntegrityPower IntegrityHigh-Speed ASIC Design56G PAM4 ExperienceSerDes ArchitecturesChannel ModelingTransmission Line TheoryElectromagneticsSPICEAdvanced Nodes Experience
Soft Skills
MentoringCollaborationContinuous Improvement
Tools & Technologies
Keysight ADSAnsys HFSSCadence APDMATLABPython ScriptingRaptor-XVector Network AnalysisIBIS
Industry Keywords
ASIC PackagingHigh-Speed Memory InterfaceUCIe InterfacesCoWoSEMIBInterposer-Based Designs

Tech Stack

Tools & technologies
Python

About the role

Key responsibilities & impact
  • Develop, document, and implement design rules for ultra-high-speed signaling
  • Analyze substrate signal integrity and power integrity
  • Collaborate with layout teams on interposer, substrate, and PCB solutions
  • Design, document, and develop ASIC packages for high-volume, high-quality release
  • Perform post-layout extraction and reporting
  • Collaborate with system partners, vendors, and design leads to resolve complex technical issues
  • Define processes, methods, and tools for complex ASIC/package development
  • Lead or participate in chip architecture discussions and high-performance ASIC design
  • Review intricate IC and analog/mixed-signal circuit designs
  • Lead the Silicon Packaging Signal and Power Integrity Team
  • Mentor and support signal integrity team members and junior engineers
  • Influence packaging and hardware teams to meet technical specifications
  • Promote design reviews, postmortems, and continuous improvement across multidisciplinary engineering teams

Requirements

What you’ll need
  • Bachelor's degree in Electrical Engineering and 10+ years of relevant signal and/or power integrity experience, or Master's degree in Electrical Engineering and 8+ years of relevant experience, or PhD in Electrical Engineering and 5+ years of relevant experience
  • Experience with multiple high-speed ASIC tape-outs from a package perspective
  • Experience with 56G PAM4 and above
  • Knowledge of high-speed SerDes architectures, channel modeling, BER prediction, transmission line theory, and electromagnetics
  • Solid understanding of scattering and impedance network parameters
  • Hands-on lab experience with Keysight ADS, Ansys HFSS/EM flow, and Cadence APD for layout review
  • Experience with SPICE
  • Preferred: experience leading small to medium technical teams
  • Preferred: experience with advanced nodes (5nm, 3nm and below)
  • Preferred: experience with HBM or high-speed memory interface SI
  • Preferred: experience with UCIe or proprietary die-to-die interfaces
  • Preferred: experience with advanced packaging such as CoWoS, EMIB, and interposer-based designs
  • Preferred: experience with MATLAB or Python scripting, Raptor-X, Vector Network Analysis, and IBIS

Benefits

Comp & perks
  • Medical, dental and vision insurance
  • 401(k) plan with a Cisco matching contribution
  • Paid parental leave
  • Short- and long-term disability coverage
  • Basic life insurance
  • Cisco restricted stock unit grants may be available
  • 10 paid holidays per full calendar year
  • 1 floating holiday for non-exempt employees
  • 1 paid day off for employee’s birthday
  • Paid year-end holiday shutdown
  • 4 paid days off for personal wellness
  • 16 days of paid vacation time per full calendar year for non-exempt employees
  • Flexible vacation time off program for exempt employees
  • 80 hours of sick time off provided on hire date and each January 1st thereafter
  • Up to 80 hours of unused sick time carried forward
  • Additional paid time away for critical or emergency family issues
  • Optional 10 paid volunteer days per full calendar year
  • Annual bonuses for non-sales roles, subject to Cisco policies