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Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in high-speed design principles and signal integrity analysis, with a strong focus on developing and validating ASIC packaging solutions. Proficient in using EDA tools for simulations and layout reviews to achieve optimal power and performance goals.
Highest-signal resume keywords
High-Speed Design PrinciplesSignal Integrity AnalysisPower Integrity AnalysisEDA Tools ProficiencyASIC Packaging Development
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
Tip: use these terms in your resume and cover letter to boost ATS matches.
Hard Skills
Transmission Line TheoryElectromagneticsScattering ParametersImpedance Network Analysis56G PAM4 SerDes ArchitecturesChannel ModelingBER PredictionSPICE Circuit-Level AnalysisSI/PI Simulations2.5D ASIC Packaging
Soft Skills
Technical Communication
Tools & Technologies
Cadence SigrityAnsys HFSSKeysight ADSCadence APDAnsys EMVector Network Analysis
Industry Keywords
ASIC PackagingHigh-Speed Memory InterfaceCoWoSEMIBInterposer-Based DesignsUCIeDie-to-Die Interfaces
About the role
Key responsibilities & impact- Develop, document, and implement design rules for ultra-high-speed signaling
- Ensure power, performance, and area goals are met for products
- Analyze substrate signal integrity and power integrity
- Collaborate with the layout team to develop optimal solutions across interposer, substrate, and PCB
- Design, document, and develop ASIC packages for high-volume, high-quality release
- Perform post-layout extraction and reporting
- Collaborate with system partners, vendors, and design leads
- Achieve combined power and signal integrity objectives
- Resolve complex technical issues using advanced technology design rules
- Help develop, define, design, and verify next-generation ASIC packaging for Cisco platforms
Requirements
What you’ll need- Bachelor’s degree in Electrical Engineering and 6+ years of relevant signal and power integrity experience, or Master’s degree in Electrical Engineering and 3+ years of relevant experience, or PhD in Electrical Engineering and 0+ years of related experience, or equivalent related work experience
- Expertise in high-speed design principles, including Transmission Line Theory, electromagnetics, scattering parameters, and impedance network analysis
- Experience applying high-speed design theory to 56G PAM4 SerDes architectures, channel modeling, and BER prediction
- Experience with pre- and post-layout SI/PI simulations using EDA tools such as Cadence Sigrity, Ansys HFSS, and Keysight ADS
- Experience conducting detailed layout reviews and physical design validation using Cadence APD and Ansys EM flows
- Working knowledge of SPICE for circuit-level analysis, signal modeling, and performance validation
- Preferred: ability to articulate technical concepts to diverse audiences verbally and in writing
- Preferred: experience with HBM or high-speed memory interface SI
- Preferred: experience with UCIe or proprietary die-to-die interfaces
- Preferred: experience with advanced packaging including CoWoS, EMIB, and interposer-based designs
- Preferred: SI/PI analysis of 2.5D ASIC packaging
- Preferred: working knowledge of Vector Network Analysis
- Preferred: basic knowledge of IBIS
Benefits
Comp & perks- Medical, dental and vision insurance
- 401(k) plan with a Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Grants of Cisco restricted stock units, subject to eligibility and continued employment
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- Paid birthday day off
- Paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation per full calendar year for non-exempt employees
- Flexible vacation time off program with no defined limit for eligible exempt employees
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- Up to 80 hours of unused sick time carried forward
- Additional paid time away for critical or emergency family issues
- Optional 10 paid volunteer days per full calendar year
- Annual bonuses for non-sales roles, subject to Cisco policies
- Performance-based incentive pay for sales-plan employees, subject to the applicable Cisco plan
