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Fortinet

Principal ASIC Design

Fortinet

. Collaborate with the architecture team to define and refine the micro-architecture of next-generation FortiASICs .

Posted 10/24/2026full-timeSunnyvale • California • United StatesLead💰 $192,000 - $235,000 per yearWebsite

Tech Stack

Tools & technologies
TCP/IP

About the role

Key responsibilities & impact
  • Collaborate with the architecture team to define and refine the micro-architecture of next-generation FortiASICs
  • Partner with Design Verification (DV) teams to review test plans, perform coverage analysis, and execute full-chip simulations
  • Implement designs using SystemVerilog/Verilog HDL
  • Conduct Lint/CDC reviews
  • Perform logic synthesis and timing analysis
  • Manage IP integration
  • Work with physical design teams to verify constraints, optimize placement and routing, close timing, and achieve optimal Power, Performance, and Area (PPA)
  • Emulate and prototype designs using FPGAs
  • Execute complete debug and validation cycles
  • Participate in system/board-level bring-up and post-silicon debugging
  • Provide ongoing technical support
  • Manage time effectively while collaborating with a diverse, cross-functional engineering team

Requirements

What you’ll need
  • 8+ years of experience in high-performance networking or processor design
  • Proven track record of taking complex ASIC/FPGA designs from initial concept to mass production
  • Hands-on expertise in Verilog / SystemVerilog HDL coding, synthesis, and design verification
  • In-depth experience across the entire high-performance ASIC development lifecycle—from specification drafting through system bring-up
  • Strong understanding of SystemVerilog and UVM verification methodologies
  • Strong background in AI/LLM accelerator or NPU (Neural Processing Unit) design
  • Strong problem-solving skills
  • Attention to detail
  • Strong written and verbal communication skills
  • Experience with Altera (Intel) / AMD Xilinx FPGA architectures, EDA tools, and IP portfolios
  • Deep understanding of Ethernet protocols and the TCP/IP networking stack
  • Experience in microprocessor architecture, programmable logic design, or custom domain-specific accelerators
  • B.S. or M.S. in Electrical Engineering (EE), Computer Engineering (CE), Computer Science (CS), or a related technical field
  • Must be authorized to work in the U.S. without sponsorship

Benefits

Comp & perks
  • Medical insurance
  • Dental insurance
  • Vision insurance
  • Life insurance
  • Disability insurance
  • 401(k)
  • 11 paid holidays
  • Vacation time
  • Sick time
  • Comprehensive leave program
  • Equity program
  • Bonus eligibility
  • Supportive work environment
  • Competitive Total Rewards package