FPGA Design Engineer

Hewlett Packard Enterprise

. Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs .

Posted 10/21/2026full-timeUnited StatesMid-LevelSenior💰 $74,000 - $170,300 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in RTL development for FPGAs and ASIC designs, with a strong focus on hardware control design, simulation, and debugging. Proficient in collaborating with cross-functional teams and utilizing various communication protocols for effective project execution.

Highest-signal resume keywords

RTL Development For FPGAsVerilog RTL SimulationBMC Controllers And Management InterfacesXilinx Spartan 6/7 And Artix 7Digital Board Schematic Interpretation

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

RTL DevelopmentVerilogFPGA DesignASIC DesignSimulationSynthesisTiming ValidationDebuggingIssue TrackingSchematic Design

Soft Skills

Excellent Communication SkillsTeam CollaborationIndependent Work

Tools & Technologies

Lab EquipmentScopesAnalyzersI2CSMBUSJTAGSPILPCPCIeEthernet

Certifications & Qualifications

Bachelor's Degree In Electrical EngineeringMaster's Degree In Electrical Engineering

Industry Keywords

FPGAASICCompute BoardsServer-Grade ProcessorsDigital DesignHPE Product DesignCo-DevelopmentFirmware DevelopmentPrinted Circuit AssemblyComplex Digital Schematics

Tech Stack

Tools & technologies

Assembly

About the role

Key responsibilities & impact

Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs
Select appropriate parts based on cost, complexity, longevity, and expandability
Design hardware controls and sequence power, control, and monitoring LSI and ASIC devices within compute, switch, or storage board designs
Perform simulation, design, synthesis, and timing validation in Verilog RTL
Create IP for interface controllers and required functionality
Conduct design reviews with design and operations teams
Contribute to team schematic design reviews according to HPE product design, development, and release processes
Generate programming models and work with firmware engineers on driver development
Collaborate with board engineers on printed circuit assembly bring-up and testing
Lead or support debugging of development and field issues
Track and document issue discovery, investigation plans and results, resolution, and closure in issue-tracking databases
Work with HPE partners and vendors to define requirements and support co-development or debugging
Work with FPGA vendors on roadmaps and new IP developments

Requirements

What you’ll need

Bachelor's or Master's degree in Electrical Engineering
4 or more years of experience writing RTL for FPGAs for complex compute boards and/or ASIC designs
Experience with BMC controllers and management interfaces using I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, Ethernet, and related protocols is desired
Knowledge of server-grade x86, ARM, and/or GPU processors is desired
Experience with Xilinx Spartan 6, Spartan 7, and Artix 7 families is desired
Ability to read and understand complex digital board schematics
Ability to work independently and within design teams on multiple projects
Ability to use lab equipment, scopes, and analyzers to debug complex problems
Ability to work successfully with engineers across all geographies to meet design requirements and schedules
Excellent written and verbal communication skills
Some travel may be required

Benefits

Comp & perks

Comprehensive benefits supporting physical, financial, and emotional wellbeing
Personal and professional development programs
Flexible work arrangements to manage work and personal needs
Inclusive workplace culture
Disability accommodation during the application or interview process