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Senior ASIC Design Verification Engineer
Hewlett Packard Enterprise. Follow and help define the team's design verification methodology .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expert-level knowledge in SystemVerilog and UVM methodologies, with extensive experience in VLSI design verification and implementation. Proficient in applying scripting and automation tools to enhance verification processes while providing mentorship and guidance to team members.
Highest-signal resume keywords
SystemVerilog ExpertiseUVM MethodologyVLSI Design VerificationScripting Languages (Python, Perl, Tcl)Analytical Problem-Solving Skills
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
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Hard Skills
SystemVerilogUVMVLSI DesignTestbench DevelopmentFunctional Coverage AnalysisRegression Failure TriageAutomation ToolsAI-Assisted VerificationEDA ToolsFPGA Tools
Soft Skills
Executive-Level CommunicationMentoringTeam Collaboration
Tools & Technologies
Agentic AI Coding ToolsLinux Development Environments
Industry Keywords
High-Speed NetworkingSwitchingNIC ASICs
Tech Stack
Tools & technologiesLinuxPerlPythonSwitching
About the role
Key responsibilities & impact- Follow and help define the team's design verification methodology
- Develop SystemVerilog and UVM testbench components, including bus functional models
- Plan and implement block- and integration-level scoreboards and checkers
- Write and analyze functional coverage
- Triage regression failures and identify logic bugs while driving bug closure
- Apply scripting, automation, and AI-assisted and agentic tools to improve verification speed and quality
- Provide guidance and mentoring to less experienced staff
- Participate in selecting future technical leaders
- Drive VLSI innovation and integrate new technologies into design organization projects
- Perform all phases of pre-silicon design verification, including methodology, test plans, testbench development, coverage closure, and sign-off reviews
Requirements
What you’ll need- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
- 10+ years of experience in VLSI design, verification, or implementation
- Expert-level knowledge of SystemVerilog and OVM or UVM methodologies
- Expert-level knowledge of programming and scripting languages, hardware description languages, EDA, and/or FPGA tools
- Expert-level analytical and problem-solving skills
- Ability to excel in a distributed team environment
- Executive-level written and verbal communication skills
- Mastery in English
- Experience verifying high-speed networking, switching, or NIC ASICs preferred
- Experience with agentic AI coding tools and workflows applied to verification preferred
- Experience with Python, Perl, Tcl, or another scripting language in Linux development environments preferred
- Experience working as part of a geographically distributed team preferred
Benefits
Comp & perks- Comprehensive benefits supporting physical, financial, and emotional wellbeing
- Personal and professional development programs
- Flexible work and personal needs management
- Inclusive workplace
- Variable incentives may also be offered