Senior ASIC Design Verification Engineer

Hewlett Packard Enterprise

. Develop HPE Slingshot switch and NIC ASIC verification for future-generation HPC and AI interconnects .

Posted 9/21/2026full-timeUnited StatesSenior💰 $135,000 - $310,500 per yearWebsite

Core Competencies

Role fit

Core Competencies

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Demonstrates expertise in VLSI design and verification, with a strong focus on SystemVerilog and UVM methodologies. Proven ability to lead technical direction, mentor team members, and enhance verification processes through automation and innovative tools.

Highest-signal resume keywords

VLSI Design VerificationSystemVerilog ExpertiseUVM MethodologyScripting Languages (Python, Perl, Tcl)High-Speed Networking Verification

ATS Keywords

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Applicant Tracking System Keywords

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Hard Skills

VLSI DesignVerification MethodologySystemVerilogUVMEDA ToolsFPGA ToolsFunctional Coverage AnalysisRegression Failure TriageAutomation ToolsAI-Assisted Verification

Soft Skills

Analytical SkillsProblem SolvingExecutive CommunicationTeam CollaborationMentoring

Tools & Technologies

HPE SlingshotBus Functional ModelsScoreboardsCheckersAgentic AI Tools

Industry Keywords

ASIC VerificationNIC ASICsHigh-Speed NetworkingDistributed Team EnvironmentTechnical Leadership

Tech Stack

Tools & technologies

LinuxPerlPythonSwitching

About the role

Key responsibilities & impact

Develop HPE Slingshot switch and NIC ASIC verification for future-generation HPC and AI interconnects
Own significant verification scope and set technical direction for a block or subsystem
Execute all phases of pre-silicon design verification
Follow and help define design verification methodology
Develop SystemVerilog and UVM testbench components, including bus functional models
Plan and implement block- and integration-level scoreboards and checkers
Write and analyze functional coverage and provide input to block-level milestones
Triage regression failures, identify logic bugs, and drive bug closure
Apply scripting, automation, AI-assisted, and agentic tools to improve verification speed and quality
Provide guidance and mentoring to less experienced staff
Participate in selecting future technical leaders
Drive VLSI innovation and integrate new technologies into design projects

Requirements

What you’ll need

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
10+ years of experience in VLSI design, verification, or implementation
Expert level knowledge of SystemVerilog and OVM or UVM methodologies
Expert level knowledge of programming and scripting languages, hardware description languages, EDA, and/or FPGA tools
Expert level analytical and problem solving skills
Ability to excel in a distributed team environment
Executive level written and verbal communication skills
Mastery in English
Experience verifying high-speed networking, switching, or NIC ASICs preferred
Experience with agentic AI coding tools and workflows applied to verification preferred
Experience with Python, Perl, Tcl, or another scripting language in Linux development environments preferred
Experience working as part of a geographically distributed team preferred

Benefits

Comp & perks

Comprehensive benefits supporting physical, financial, and emotional wellbeing
Personal and professional development programs
Career development opportunities
Flexible work and personal needs management
Accessibility accommodations during the application or interview process
Employee benefits available through HPE’s US benefits program