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Senior ASIC Design Verification Engineer
Hewlett Packard Enterprise. Lead all phases of pre-silicon design verification, including methodology, test-plan development, testbench development, coverage closure, and sign-off reviews .
Core Competencies
Role fitCore Competencies
Use this summary to align your resume positioning with the role.
Demonstrates expertise in VLSI design verification, including proficiency in SystemVerilog and UVM methodologies, along with strong analytical and problem-solving skills. Capable of leading teams, mentoring staff, and integrating innovative technologies to enhance verification processes.
Highest-signal resume keywords
SystemVerilog ExpertiseUVM MethodologyVLSI Design VerificationPython ScriptingAnalytical Problem-Solving
ATS Keywords
Tailor your resumeApplicant Tracking System Keywords
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Hard Skills
VLSI DesignDesign VerificationTestbench DevelopmentFunctional Coverage AnalysisRegression Failure TriageAutomation ToolsBus Functional ModelsScoreboard ImplementationAgentic AI ToolsEDA Tools
Soft Skills
Executive-Level CommunicationMentoringTeam CollaborationProblem-SolvingAdaptability
Tools & Technologies
SystemVerilogUVMPythonPerlTclLinux Development EnvironmentAI-Assisted ToolsEDA ToolsFPGA ToolsScripting Languages
Industry Keywords
High-Speed NetworkingSwitchingNIC ASICsDesign Verification MethodologyGeographically Distributed Teams
Tech Stack
Tools & technologiesLinuxPerlPythonSwitching
About the role
Key responsibilities & impact- Lead all phases of pre-silicon design verification, including methodology, test-plan development, testbench development, coverage closure, and sign-off reviews
- Follow and help define the team's design verification methodology
- Develop SystemVerilog and UVM testbench components, including bus functional models
- Plan and implement block- and integration-level scoreboards and checkers
- Write and analyze functional coverage and provide input on block-level milestones
- Triage regression failures, identify logic bugs, and drive bug closure
- Apply scripting, automation, AI-assisted, and agentic tools to improve verification speed and quality
- Guide and mentor less experienced staff members
- Participate in selecting future technical leaders
- Drive VLSI innovation and integrate new technologies into design organization projects
Requirements
What you’ll need- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent
- 10+ years of experience in VLSI design, verification, or implementation
- Expert-level knowledge of SystemVerilog and OVM or UVM methodologies
- Expert-level knowledge of programming and scripting languages, hardware description languages, EDA, and/or FPGA tools
- Expert-level analytical and problem-solving skills
- Ability to excel in a distributed team environment
- Executive-level written and verbal communication skills
- Mastery in English
- Experience verifying high-speed networking, switching, or NIC ASICs
- Experience with agentic AI coding tools and workflows applied to verification
- Experience with Python, Perl, Tcl, or another scripting language in Linux development environments
- Experience working as part of a geographically distributed team
Benefits
Comp & perks- Comprehensive benefits supporting physical, financial, and emotional wellbeing
- Personal and professional development programs
- Flexible work and personal needs management
- Inclusive workplace
- Reasonable accommodation during application or interview process for applicants with disabilities