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Hewlett Packard Enterprise

VLSI ASIC Logic Design Engineer

Hewlett Packard Enterprise

. Design, analyze, develop, modify, and evaluate VLSI components and hardware systems .

Posted 11/6/2026full-timeUnited StatesJunior💰 $109,000 - $251,000 per yearWebsite

Core Competencies

Role fit
Core Competencies

Use this summary to align your resume positioning with the role.

Demonstrates expertise in VLSI design and verification, utilizing SystemVerilog and Formal Verification techniques to ensure design correctness. Strong analytical skills and the ability to communicate effectively with cross-functional teams are essential for successful project execution.

Highest-signal resume keywords
VLSI DesignSystemVerilogFormal VerificationDesign VerificationElectrical Engineering

ATS Keywords

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Applicant Tracking System Keywords

Tip: use these terms in your resume and cover letter to boost ATS matches.

Hard Skills
VLSI PrinciplesDigital LogicComputer ArchitectureIntegrated CircuitryEDA ToolsFPGA ToolsCoverage AnalysisAlgorithm DesignExperimental TestingArchitecture Design
Soft Skills
Analytical SkillsProblem-Solving SkillsWritten CommunicationVerbal CommunicationMentoring
Tools & Technologies
SystemVerilog AssertionsUVMEthernet ProtocolsCPU SystemsGPU Systems
Industry Keywords
Electrical EngineeringVLSI DesignDesign VerificationIntegrated Circuit LayoutsOSI Model

About the role

Key responsibilities & impact
  • Design, analyze, develop, modify, and evaluate VLSI components and hardware systems
  • Determine architecture and logic design
  • Perform design verification using software for component and system simulation
  • Build physical implementations through multidimensional designs involving complex integrated-circuit layouts
  • Analyze designs to establish operating data, conduct experimental tests, and evaluate results
  • Participate independently on project teams with VLSI engineers and internal and outsourced development partners
  • Perform VLSI/RTL design using SystemVerilog
  • Create SystemVerilog Assertions and use Formal Verification to prove design correctness
  • Write coverage, measure stimulus quality, and identify verification holes through coverage analysis
  • Create documentation communicating design intent to verification and firmware teams
  • Explore system latency and bandwidth trade-offs, identify bottlenecks, and propose solutions
  • Communicate with management and internal partners regarding design status, project progress, and issue resolution
  • Guide and mentor less experienced staff members

Requirements

What you’ll need
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering or equivalent
  • 1–6 years of experience in VLSI design, verification, or implementation
  • Strong knowledge of electrical engineering fundamentals, VLSI principles, digital logic, and computer architecture
  • Strong analytical and problem-solving skills
  • Strong experience designing VLSI components, integrated circuitry, architectures, and algorithms
  • Strong knowledge of programming and scripting, hardware description languages, electronic design automation (EDA), and/or FPGA tools
  • Coursework in VLSI design or VLSI concepts
  • Strong written and verbal communication skills
  • Mastery in English and local language
  • Subject matter knowledge in major areas of responsibility
  • Understanding of the OSI model for layered networking stacks
  • Experience with Ethernet protocols, CPU or GPU systems, and high-speed peripherals
  • Experience with Formal Verification and design verification using UVM

Benefits

Comp & perks
  • Health and wellbeing benefits supporting physical, financial and emotional wellbeing
  • Personal and professional development programs
  • Flexible work arrangements to manage work and personal needs
  • Inclusive workplace
  • Variable incentives may also be offered